From patchwork Fri Nov 22 10:06:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sakari Ailus X-Patchwork-Id: 13883016 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C6EC1D90BC for ; Fri, 22 Nov 2024 10:07:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732270021; cv=none; b=F8g0QKEh+4TzHk+26/fErKKPpsVBPlV8q+JNy5N13O9gMfMKyjZNE68fOEJLmOboyhPmP8Px2cNJH8oMSuZM/VMx6pSKSM7/vFNYan5o0ACx5W/K1QLPACAs9X2kVPZHdOc4l5Gzs1N5ukvG6Rt/aJbFgEnCJGpNB26FhTUKVvQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732270021; c=relaxed/simple; bh=XjzA4XGwvHVywRyLTBD+N3yhShUwTqaQr4zXrHO3Xs0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=my0aGUDqofZbD6pldHmjD0zz/9ZvtfR7rnVxAecgFJ5eFgj2fxJgwkjsMvDTy/RtBfCjbiRnMspGKvnbGxDbeqUVVEeNpop9ZUPrQpfu5KJ/P6fpv1l5thTuqwXLNdSHdlhTCfx0a0uRW1aAPu5c9Mey6wfv4UQ/uykZ3AP6rNc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nwMDBuev; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nwMDBuev" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1732270020; x=1763806020; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XjzA4XGwvHVywRyLTBD+N3yhShUwTqaQr4zXrHO3Xs0=; b=nwMDBuevmwkbEeFaAY/K7MoOlxWBlGQ48q3yv7XVgzDeg0EdukU5e31l D1FVBSrQTm3kAsKzIcUuViW2WTgnIUhMPYblQNxWmU+cXBk6vmoH930s+ pxSN0ru6kI8wG+ckAk2fh5cbLW3gI1MHCRWQ7te7bEH6N4ixCNVUVQ9+6 PmvqZFyakEzbo0Al/xL1+NQecPsVEoPA5vEsX5vrnGY2SJTCs1LBwmQWv HSjklBsKoOpLl3F5pEWjF16KQnYn63aLQ3EK2FB5QJCjztXxrdewJ/JSB VjnzukidiNVRMMkErXxSnXmRFkAMnJ+LpXCcFDGPWEc4EcNcUhLv4ORkc g==; X-CSE-ConnectionGUID: sWsMq2EHRd6rZ/+R27pLcQ== X-CSE-MsgGUID: WwiNXYBPQy2fm1UjZswOug== X-IronPort-AV: E=McAfee;i="6700,10204,11263"; a="54927630" X-IronPort-AV: E=Sophos;i="6.12,175,1728975600"; d="scan'208";a="54927630" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2024 02:07:00 -0800 X-CSE-ConnectionGUID: +bx3UJXIT4Sc5p1vMRdEcw== X-CSE-MsgGUID: bmOV2JlWQuWxklPWZ3wYVA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,175,1728975600"; d="scan'208";a="121403089" Received: from turnipsi.fi.intel.com (HELO kekkonen.fi.intel.com) ([10.237.72.44]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2024 02:06:54 -0800 Received: from punajuuri.localdomain (punajuuri.localdomain [192.168.240.130]) by kekkonen.fi.intel.com (Postfix) with ESMTP id 9565012072C; Fri, 22 Nov 2024 12:06:43 +0200 (EET) Received: from sailus by punajuuri.localdomain with local (Exim 4.96) (envelope-from ) id 1tEQYl-0002LW-1u; Fri, 22 Nov 2024 12:06:43 +0200 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo From: Sakari Ailus To: linux-media@vger.kernel.org Cc: hverkuil@xs4all.nl, laurent.pinchart@ideasonboard.com, Prabhakar , Kate Hsuan , Alexander Shiyan , Mikhail Rudenko , Dave Stevenson , Tommaso Merciai , Umang Jain , Benjamin Mugnier , Sylvain Petinot , Christophe JAILLET , Julien Massot , Naushir Patuck , "Yan, Dongcheng" , "Cao, Bingbu" , "Qiu, Tian Shu" , "Wang, Hongju" , Stefan Klug , Mirela Rabulea , =?utf-8?q?Andr=C3=A9_Apitzsch?= , Heimir Thor Sverrisson , Kieran Bingham , Stanislaw Gruszka , Mehdi Djait Subject: [PATCH 5/8] media: uapi: Add V4L2_CID_CONFIG_MODEL control Date: Fri, 22 Nov 2024 12:06:30 +0200 Message-Id: <20241122100633.8971-6-sakari.ailus@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241122100633.8971-1-sakari.ailus@linux.intel.com> References: <20241122100633.8971-1-sakari.ailus@linux.intel.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the V4L2_CID_CONFIG_MODEL control for the configuration model. Signed-off-by: Sakari Ailus Reviewed-by: Laurent Pinchart --- .../userspace-api/media/v4l/ext-ctrls-image-process.rst | 4 ++++ drivers/media/v4l2-core/v4l2-ctrls-defs.c | 5 +++++ include/uapi/linux/v4l2-controls.h | 3 +++ 3 files changed, 12 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst index 27803dca8d3e..928e8e3eed7f 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst @@ -55,3 +55,7 @@ Image Process Control IDs control value divided by e.g. 0x100, meaning that to get no digital gain the control value needs to be 0x100. The no-gain configuration is also typically the default. + +``V4L2_CID_CONFIG_MODEL (bitmask)`` + Which configuration models the sub-device supports. Please see + :ref:`media_subdev_config_model`. diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c index 1ea52011247a..24c9c25e20d1 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c @@ -1164,6 +1164,7 @@ const char *v4l2_ctrl_get_name(u32 id) case V4L2_CID_TEST_PATTERN: return "Test Pattern"; case V4L2_CID_DEINTERLACING_MODE: return "Deinterlacing Mode"; case V4L2_CID_DIGITAL_GAIN: return "Digital Gain"; + case V4L2_CID_CONFIG_MODEL: return "Sub-device configuration model"; /* DV controls */ /* Keep the order of the 'case's the same as in v4l2-controls.h! */ @@ -1481,6 +1482,10 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, case V4L2_CID_DV_RX_POWER_PRESENT: *type = V4L2_CTRL_TYPE_BITMASK; break; + case V4L2_CID_CONFIG_MODEL: + *flags |= V4L2_CTRL_FLAG_READ_ONLY; + *type = V4L2_CTRL_TYPE_BITMASK; + break; case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: *type = V4L2_CTRL_TYPE_INTEGER; diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 974fd254e573..0152240229ab 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -1225,6 +1225,9 @@ enum v4l2_jpeg_chroma_subsampling { #define V4L2_CID_TEST_PATTERN (V4L2_CID_IMAGE_PROC_CLASS_BASE + 3) #define V4L2_CID_DEINTERLACING_MODE (V4L2_CID_IMAGE_PROC_CLASS_BASE + 4) #define V4L2_CID_DIGITAL_GAIN (V4L2_CID_IMAGE_PROC_CLASS_BASE + 5) +#define V4L2_CID_CONFIG_MODEL (V4L2_CID_IMAGE_PROC_CLASS_BASE + 6) + +#define V4L2_CID_CONFIG_MODEL_COMMON_RAW (1ULL << 0) /* DV-class control IDs defined by V4L2 */ #define V4L2_CID_DV_CLASS_BASE (V4L2_CTRL_CLASS_DV | 0x900)