new file mode 100644
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/ti,fpc202.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI FPC202 dual port controller with expanded IOs
+
+maintainers:
+ - Romain Gantois <romain.gantois@bootlin.com>
+
+allOf:
+ - $ref: /schemas/i2c/i2c-atr.yaml#
+
+properties:
+ compatible:
+ const: ti,fpc202
+
+ reg:
+ maxItems: 1
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ enable-gpios:
+ description:
+ Specifier for the GPIO connected to the EN pin.
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+patternProperties:
+ "^i2c@[0-1]$":
+ $ref: /schemas/i2c/i2c-controller.yaml
+ description: Downstream device ports 0 and 1
+
+ properties:
+ reg:
+ maxItems: 1
+ description:
+ Downstream port ID
+
+ required:
+ - "#address-cells"
+ - "#size-cells"
+ - reg
+
+ unevaluatedProperties: false
+
+required:
+ - compatible
+ - gpio-controller
+ - "#gpio-cells"
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+ - i2c@0
+ - i2c@1
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-atr@f {
+ compatible = "ti,fpc202";
+ reg = <0xf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+...
@@ -23181,6 +23181,12 @@ F: drivers/misc/tifm*
F: drivers/mmc/host/tifm_sd.c
F: include/linux/tifm.h
+TI FPC202 DUAL PORT CONTROLLER
+M: Romain Gantois <romain.gantois@bootlin.com>
+L: linux-kernel@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/misc/ti,fpc202.yaml
+
TI FPD-LINK DRIVERS
M: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
L: linux-media@vger.kernel.org
The FPC202 dual port controller serves as a low speed signal aggregator for common port types, notably SFP. It provides access to I2C and low-speed GPIO signals of a downstream device through a single upstream control interface. Up to two logical I2C addresses can be accessed on each of the FPC202's ports. The port controller acts as an I2C translator (ATR). It converts addresses of incoming and outgoing I2C transactions. One use case of this is accessing two SFP modules at logical address 0x50 from the same upstream I2C controller, using two different client aliases. Signed-off-by: Romain Gantois <romain.gantois@bootlin.com> --- .../devicetree/bindings/misc/ti,fpc202.yaml | 96 ++++++++++++++++++++++ MAINTAINERS | 6 ++ 2 files changed, 102 insertions(+)