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Lin" , Singo Chang , Nancy Lin , Moudy Ho , Xavier Chang , Subject: [PATCH v3 7/7] media: mediatek: mdp3: Add programming flow for unsupported subsys ID hardware Date: Fri, 20 Dec 2024 01:08:00 +0800 Message-ID: <20241219170800.2957-8-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20241219170800.2957-1-jason-jh.lin@mediatek.com> References: <20241219170800.2957-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N To support hardware without subsys IDs on new SoCs, add a programming flow that checks whether the subsys ID is valid. If the subsys ID is invalid, the flow will call 2 alternative CMDQ APIs: cmdq_pkt_assign() and cmdq_pkt_write_s_mask_value() to achieve the same functionality. Signed-off-by: Jason-JH.Lin --- .../platform/mediatek/mdp3/mtk-mdp3-cmdq.c | 18 ++++- .../platform/mediatek/mdp3/mtk-mdp3-comp.h | 79 ++++++++++++++----- 2 files changed, 77 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c index e5ccf673e152..0ee3354963db 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c @@ -321,7 +321,14 @@ static int mdp_path_config_subfrm(struct mdp_cmdq_cmd *cmd, /* Enable mux settings */ for (index = 0; index < ctrl->num_sets; index++) { set = &ctrl->sets[index]; - cmdq_pkt_write(&cmd->pkt, set->subsys_id, set->reg, set->value); + if (set->subsys_id != CMDQ_SUBSYS_INVALID) { + cmdq_pkt_write(&cmd->pkt, set->subsys_id, set->reg, set->value); + } else { + /* only MMIO access, no need to check mminfro_offset */ + cmdq_pkt_assign(&cmd->pkt, CMDQ_THR_SPR_IDX0, CMDQ_ADDR_HIGH(set->reg)); + cmdq_pkt_write_s_value(&cmd->pkt, CMDQ_THR_SPR_IDX0, + CMDQ_ADDR_LOW(set->reg), set->value); + } } /* Config sub-frame information */ for (index = (num_comp - 1); index >= 0; index--) { @@ -376,7 +383,14 @@ static int mdp_path_config_subfrm(struct mdp_cmdq_cmd *cmd, /* Disable mux settings */ for (index = 0; index < ctrl->num_sets; index++) { set = &ctrl->sets[index]; - cmdq_pkt_write(&cmd->pkt, set->subsys_id, set->reg, 0); + if (set->subsys_id != CMDQ_SUBSYS_INVALID) { + cmdq_pkt_write(&cmd->pkt, set->subsys_id, set->reg, 0); + } else { + /* only MMIO access, no need to check mminfro_offset */ + cmdq_pkt_assign(&cmd->pkt, CMDQ_THR_SPR_IDX0, CMDQ_ADDR_HIGH(set->reg)); + cmdq_pkt_write_s_value(&cmd->pkt, CMDQ_THR_SPR_IDX0, + CMDQ_ADDR_LOW(set->reg), 0); + } } return 0; diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h index 681906c16419..e20f9d080db9 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h @@ -9,17 +9,44 @@ #include "mtk-mdp3-cmdq.h" -#define MM_REG_WRITE_MASK(cmd, id, base, ofst, val, mask) \ -do { \ - typeof(mask) (m) = (mask); \ - cmdq_pkt_write_mask(&((cmd)->pkt), id, (base) + (ofst), \ - (val), \ - (((m) & (ofst##_MASK)) == (ofst##_MASK)) ? \ - (0xffffffff) : (m)); \ +#define MM_REG_WRITE_MASK(cmd, id, base, ofst, val, mask) \ +do { \ + typeof(cmd) (_c) = (cmd); \ + typeof(id) (_i) = (id); \ + typeof(base) (_b) = (base); \ + typeof(ofst) (_o) = (ofst); \ + typeof(val) (_v) = (val); \ + typeof(mask) (_m) = (mask); \ + _m = ((_m & (ofst##_MASK)) == (ofst##_MASK)) ? 0xffffffff : _m; \ + if (_i != CMDQ_SUBSYS_INVALID) { \ + cmdq_pkt_write_mask(&_c->pkt, _i, _b + _o, _v, _m); \ + } else { \ + /* only MMIO access, no need to check mminfro_offset */ \ + cmdq_pkt_assign(&_c->pkt, CMDQ_THR_SPR_IDX0, \ + CMDQ_ADDR_HIGH(_b)); \ + cmdq_pkt_write_s_mask_value(&_c->pkt, CMDQ_THR_SPR_IDX0,\ + CMDQ_ADDR_LOW(_b + _o), \ + _v, _m); \ + } \ } while (0) -#define MM_REG_WRITE(cmd, id, base, ofst, val) \ - cmdq_pkt_write(&((cmd)->pkt), id, (base) + (ofst), (val)) +#define MM_REG_WRITE(cmd, id, base, ofst, val) \ +do { \ + typeof(cmd) (_c) = (cmd); \ + typeof(id) (_i) = (id); \ + typeof(base) (_b) = (base); \ + typeof(ofst) (_o) = (ofst); \ + typeof(val) (_v) = (val); \ + if (_i != CMDQ_SUBSYS_INVALID) { \ + cmdq_pkt_write(&_c->pkt, _i, _b + _o, _v); \ + } else { \ + /* only MMIO access, no need to check mminfro_offset */ \ + cmdq_pkt_assign(&_c->pkt, CMDQ_THR_SPR_IDX0, \ + CMDQ_ADDR_HIGH(_b)); \ + cmdq_pkt_write_s_value(&_c->pkt, CMDQ_THR_SPR_IDX0, \ + CMDQ_ADDR_LOW(_b + _o), _v); \ + } \ +} while (0) #define MM_REG_WAIT(cmd, evt) \ do { \ @@ -49,17 +76,33 @@ do { \ cmdq_pkt_set_event(&((c)->pkt), (e)); \ } while (0) -#define MM_REG_POLL_MASK(cmd, id, base, ofst, val, _mask) \ -do { \ - typeof(_mask) (_m) = (_mask); \ - cmdq_pkt_poll_mask(&((cmd)->pkt), id, \ - (base) + (ofst), (val), \ - (((_m) & (ofst##_MASK)) == (ofst##_MASK)) ? \ - (0xffffffff) : (_m)); \ +#define MM_REG_POLL_MASK(cmd, id, base, ofst, val, mask) \ +do { \ + typeof(cmd) (_c) = (cmd); \ + typeof(id) (_i) = (id); \ + typeof(base) (_b) = (base); \ + typeof(ofst) (_o) = (ofst); \ + typeof(val) (_v) = (val); \ + typeof(mask) (_m) = (mask); \ + _m = ((_m & (ofst##_MASK)) == (ofst##_MASK)) ? 0xffffffff : _m; \ + if (_i != CMDQ_SUBSYS_INVALID) \ + cmdq_pkt_poll_mask(&_c->pkt, _i, _b + _o, _v, _m); \ + else /* POLL not support SPR, so use cmdq_pkt_poll_addr() */ \ + cmdq_pkt_poll_addr(&_c->pkt, _b + _o, _v, _m); \ } while (0) -#define MM_REG_POLL(cmd, id, base, ofst, val) \ - cmdq_pkt_poll(&((cmd)->pkt), id, (base) + (ofst), (val)) +#define MM_REG_POLL(cmd, id, base, ofst, val) \ +do { \ + typeof(cmd) (_c) = (cmd); \ + typeof(id) (_i) = (id); \ + typeof(base) (_b) = (base); \ + typeof(ofst) (_o) = (ofst); \ + typeof(val) (_v) = (val); \ + if (_i != CMDQ_SUBSYS_INVALID) \ + cmdq_pkt_poll(&_c->pkt, _i, _b + _o, _v); \ + else /* POLL not support SPR, so use cmdq_pkt_poll_addr() */ \ + cmdq_pkt_poll_addr(&_c->pkt, _b + _o, _v, 0xffffffff); \ +} while (0) enum mtk_mdp_comp_id { MDP_COMP_NONE = -1, /* Invalid engine */