From patchwork Sun Jan 19 00:54:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 13944273 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DCA03B7A8 for ; Sun, 19 Jan 2025 00:55:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737248111; cv=none; b=PZpU0UpoQ1XXUhPEmL7K0D5SbAbvaahzb7LiZv4geRG7JnoZulKtp9GuPsU50zXlFYGYFVEU6bV+HXnWy/Tg4JsE+cRfHWRrh/TGzOG8kd+W1LSnJlE7y+lxERLMgML26sPS6U2puYnXp/pEuDG5dGHBlou2xWe8jaDIX21U9UM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737248111; c=relaxed/simple; bh=PlOw7nF5pfLWg+XyoBfdQgQ5sbCIAVlkt+kb8yr43/s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cAkIBk2MscBWccWSkFcwJVuGjqLtv3mSJNmdTK683mxxBnhPXq7tSblYbinigAK12CMxOdV7iEuC3y+8R09OL/r/r2tMoTdqrmi0tXgufXA9hn0GHg7VJqk4LzK5RGb3hP4BxNIwrC4QQL+ofF2syLa7K25n8vIUkL4bTMx59ME= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=OlHDHaHf; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="OlHDHaHf" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-43635796b48so20645545e9.0 for ; Sat, 18 Jan 2025 16:55:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1737248108; x=1737852908; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/LnFqNCfdIV75tSZtVTMHBAt0g/a4qSXxUtuzXtDuHI=; b=OlHDHaHfP3WdbuJ3YyUaO1N2Fi80cutcjFy8h8SwEWFRN5cnQBO3L+JdOU398ljdJj TUxbLJZ2ivXkqQGf8hn2cvXH5U5FpjnerCCo7iXPggnbkKYbLpScBl1JQ6opagA7gio0 Gbxmk71yGAEtdNTpMYk61oQGkxVD1GVX35f3rVaa05p532ErIHbG4pZBeVi2c4JyEdz6 WBbUCg3fBim+iFLba0lb3gwN6it6Bwa8zczT2xKTirWBN/Cz2ZFLggIQSvLLGhuuuTsE gfhIhlvA6UAxrCKtEc8sLKTFzzwnlFZwQwGMj+wI0wgON4tFU7RscgHn0+BWio7tNAxG x+oQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737248108; x=1737852908; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/LnFqNCfdIV75tSZtVTMHBAt0g/a4qSXxUtuzXtDuHI=; b=sZ1ow6WejgC6x/ikueJU8XAW+bh3BLX01YCcOj35UK1/Rfc5VRzG2QMcbzHiEz4Z05 pkzZmmarPtaCh0DS1PR+PoyG+aL+nJiJCtIDJK9GI4XPf4PNhzD3YlVNsEf6PqOUrE7E KwOZ7qh8KIcj3/aiDUvuo1K84Dbv0F5jZ1dbtKUUonfmPwEqAg57RGmV2dqz/TMEUA6/ n9Pr3vFAB7LQoAIHu0g6L/PMvNyIhNpnpq7UZkXL30dx3jveXn1h9uxVWqAggDk/DTrc 4hceffgxS/0s2uUFy1ABAO5WMCsGsMYB/obsvA4aPHynRD48SJf2BD+L0+zaRwpx0NNV /brg== X-Forwarded-Encrypted: i=1; AJvYcCX6mt2743Qbcw+jmtSQfSNONQAexRZzMRSkfUxkF+F5RMrOmmol70uUVUvOmu6TGncCon3jbpVMUCXGPQ==@vger.kernel.org X-Gm-Message-State: AOJu0YzUnjiPpJzYt9lyuJ00xuwG7VAOvx4+JRyqgYfZ56VcKpE9N/CQ 9dUeWT7/NPJQ2VFNQT7d6XXB3plgu8oeDtGuJEyWt2PL9HDdEGlqoyHrljtPcRE= X-Gm-Gg: ASbGnctyiE2MqK9hJjaUFdAokwVunICm8c5sSKWUuR4k6ikFfPzMXW/afN1RNd05IMB LMXD9bEOUqnEE0IHMb3UDuvNl40GGUkdNhcVDkxrOFFPHV9m/pMShmQiyKKCpksisyVAF5iYqQ3 Bzgr6x6/gRcKb/0BnaNl/yEc/FB9iNKitPrQM18f0HptLFZNYVWhdkKeIDjR6L6Wj+bmwHYtNyP MWOwroXQEG+xTCQcZvCrn3p4z7OCrcR6UnJ8jwhRCG0CNu6bE5IHTpMja4tD2N8tsDh9Tywg1xu oyo= X-Google-Smtp-Source: AGHT+IHkeYyqaXBSmbz8idwxpSHDOi3+ViIcrcNe53eiDH4jcv8goNaGtkAIbymVPP/TrvOelfhkOA== X-Received: by 2002:a05:600c:1381:b0:434:fc5d:179c with SMTP id 5b1f17b1804b1-43891905c1fmr70588025e9.13.1737248107757; Sat, 18 Jan 2025 16:55:07 -0800 (PST) Received: from [127.0.1.1] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf322aa40sm6339241f8f.45.2025.01.18.16.55.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Jan 2025 16:55:06 -0800 (PST) From: Bryan O'Donoghue Date: Sun, 19 Jan 2025 00:54:56 +0000 Subject: [PATCH v4 4/4] arm64: dts: qcom: x1e80100: Add CAMSS block definition Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-4-c2964504131c@linaro.org> References: <20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-0-c2964504131c@linaro.org> In-Reply-To: <20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-0-c2964504131c@linaro.org> To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , Mauro Carvalho Chehab , Bjorn Andersson , Michael Turquette , Stephen Boyd , Vladimir Zapolskiy , Jagadeesh Kona , Konrad Dybcio Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Konrad Dybcio X-Mailer: b4 0.15-dev-33ea6 Add dtsi to describe the xe180100 CAMSS block 4 x CSIPHY 2 x CSID 2 x CSID Lite 2 x IFE 2 x IFE Lite Reviewed-by: Konrad Dybcio Reviewed-by: Vladimir Zapolskiy Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 185 +++++++++++++++++++++++++++++++++ 1 file changed, 185 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index de05916e6f295..ebfcb3d60d9fb 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -5188,6 +5188,191 @@ cci1_i2c1: i2c-bus@1 { }; }; + camss: isp@acb6000 { + compatible = "qcom,x1e80100-camss"; + + reg = <0 0x0acb6000 0 0x1000>, + <0 0x0acb7000 0 0x2000>, + <0 0x0acb9000 0 0x2000>, + <0 0x0acbb000 0 0x2000>, + <0 0x0acc6000 0 0x1000>, + <0 0x0acca000 0 0x1000>, + <0 0x0ace4000 0 0x2000>, + <0 0x0ace6000 0 0x2000>, + <0 0x0ace8000 0 0x2000>, + <0 0x0acec000 0 0x2000>, + <0 0x0acf6000 0 0x1000>, + <0 0x0acf7000 0 0x1000>, + <0 0x0acf8000 0 0x1000>, + <0 0x0acc7000 0 0x2000>, + <0 0x0accb000 0 0x2000>, + <0 0x0ac62000 0 0x4000>, + <0 0x0ac71000 0 0x4000>; + reg-names = "csid_wrapper", + "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy4", + "csitpg0", + "csitpg1", + "csitpg2", + "vfe_lite0", + "vfe_lite1", + "vfe0", + "vfe1"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_NRT_CLK>, + <&camcc CAM_CC_CORE_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, + <&camcc CAM_CC_CPAS_IFE_0_CLK>, + <&camcc CAM_CC_CPAS_IFE_1_CLK>, + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSID_CLK>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY4_CLK>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; + clock-names = "camnoc_rt_axi", + "camnoc_nrt_axi", + "core_ahb", + "cpas_ahb", + "cpas_fast_ahb", + "cpas_vfe0", + "cpas_vfe1", + "cpas_vfe_lite", + "cphy_rx_clk_src", + "csid", + "csid_csiphy_rx", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy4", + "csiphy4_timer", + "gcc_axi_hf", + "gcc_axi_sf", + "vfe0", + "vfe0_fast_ahb", + "vfe1", + "vfe1_fast_ahb", + "vfe_lite", + "vfe_lite_ahb", + "vfe_lite_cphy_rx", + "vfe_lite_csid"; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy4", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "cam_ahb", + "cam_hf_mnoc", + "cam_sf_mnoc", + "cam_sf_icp_mnoc"; + + iommus = <&apps_smmu 0x800 0x60>, + <&apps_smmu 0x860 0x60>, + <&apps_smmu 0x1800 0x60>, + <&apps_smmu 0x1860 0x60>, + <&apps_smmu 0x18e0 0x00>, + <&apps_smmu 0x1900 0x00>, + <&apps_smmu 0x1980 0x20>, + <&apps_smmu 0x19a0 0x20>; + + power-domains = <&camcc CAM_CC_IFE_0_GDSC>, + <&camcc CAM_CC_IFE_1_GDSC>, + <&camcc CAM_CC_TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + port@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + port@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + camcc: clock-controller@ade0000 { compatible = "qcom,x1e80100-camcc"; reg = <0 0x0ade0000 0 0x20000>;