Message ID | 20250210060923.2434047-1-dongcheng.yan@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | [v5] media: i2c: add lt6911uxe hdmi bridge driver | expand |
Hi reviewers, I'm sorry for two alignment issues that are not detected by checkpatch. And this patch is based on <https://lore.kernel.org/linux-media/20241210075906.609490-1-sakari.ailus@linux.intel.com>, which supports obtaining link frequency via get_mbus_config. So that I can remove "link_freq" v4l2_ctrl_handler in this HDMI to MIPI bridge. On 2/10/2025 2:09 PM, Dongcheng Yan wrote: > Lontium LT9611UXE is a HDMI to MIPI CSI-2 bridge, > It supports modes up to 4k60fps, switches current mode when > plugging HDMI or changing the source active signal mode. > > Signed-off-by: Dongcheng Yan <dongcheng.yan@intel.com> > --- > v1 -> v2: replaced mutex with state_lock > v2 -> v3: fixed some pm_runtime err handlings > v3 -> v4: add dv_timings api > v4 -> v5: use get_mbus_config to replace link_freq v4l2_ctrl_handler > rm lt6911uxe_enum_frame_size & lt6911uxe_enum_frame_interval > > patch has been tested with Intel IPU isp. > --- > drivers/media/i2c/Kconfig | 12 + > drivers/media/i2c/Makefile | 1 + > drivers/media/i2c/lt6911uxe.c | 717 ++++++++++++++++++++++++++++++++++ > 3 files changed, 730 insertions(+) > create mode 100644 drivers/media/i2c/lt6911uxe.c > > diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig > index 8ba096b8ebca..fbe3d0fe4ce6 100644 > --- a/drivers/media/i2c/Kconfig > +++ b/drivers/media/i2c/Kconfig > @@ -1526,6 +1526,18 @@ config VIDEO_I2C > To compile this driver as a module, choose M here: the > module will be called video-i2c > > +config VIDEO_LT6911UXE > + tristate "Lontium LT6911UXE decoder" > + depends on ACPI && VIDEO_DEV > + select V4L2_FWNODE > + select V4L2_CCI_I2C > + help > + This is a Video4Linux2 sensor-level driver for the Lontium > + LT6911UXE HDMI to MIPI CSI-2 bridge. > + > + To compile this driver as a module, choose M here: the > + module will be called lt6911uxe. > + > config VIDEO_M52790 > tristate "Mitsubishi M52790 A/V switch" > depends on VIDEO_DEV && I2C > diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile > index fbb988bd067a..6c23a4463527 100644 > --- a/drivers/media/i2c/Makefile > +++ b/drivers/media/i2c/Makefile > @@ -64,6 +64,7 @@ obj-$(CONFIG_VIDEO_ISL7998X) += isl7998x.o > obj-$(CONFIG_VIDEO_KS0127) += ks0127.o > obj-$(CONFIG_VIDEO_LM3560) += lm3560.o > obj-$(CONFIG_VIDEO_LM3646) += lm3646.o > +obj-$(CONFIG_VIDEO_LT6911UXE) += lt6911uxe.o > obj-$(CONFIG_VIDEO_M52790) += m52790.o > obj-$(CONFIG_VIDEO_MAX9271_LIB) += max9271.o > obj-$(CONFIG_VIDEO_MAX9286) += max9286.o > diff --git a/drivers/media/i2c/lt6911uxe.c b/drivers/media/i2c/lt6911uxe.c > new file mode 100644 > index 000000000000..4f74648e4545 > --- /dev/null > +++ b/drivers/media/i2c/lt6911uxe.c > @@ -0,0 +1,717 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// Copyright (c) 2023 - 2024 Intel Corporation. > + > +#include <linux/acpi.h> > +#include <linux/delay.h> > +#include <linux/gpio/consumer.h> > +#include <linux/i2c.h> > +#include <linux/interrupt.h> > +#include <linux/module.h> > +#include <linux/pm_runtime.h> > +#include <linux/regmap.h> > +#include <linux/v4l2-dv-timings.h> > + > +#include <media/v4l2-cci.h> > +#include <media/v4l2-ctrls.h> > +#include <media/v4l2-device.h> > +#include <media/v4l2-dv-timings.h> > +#include <media/v4l2-event.h> > +#include <media/v4l2-fwnode.h> > + > +#define LT6911UXE_CHIP_ID 0x2102 > +#define REG_CHIP_ID CCI_REG16(0xe100) > + > +#define REG_ENABLE_I2C CCI_REG8(0xe0ee) > +#define REG_HALF_PIX_CLK CCI_REG24(0xe085) > +#define REG_BYTE_CLK CCI_REG24(0xe092) > +#define REG_HALF_H_TOTAL CCI_REG16(0xe088) > +#define REG_V_TOTAL CCI_REG16(0xe08a) > +#define REG_HALF_H_ACTIVE CCI_REG16(0xe08c) > +#define REG_V_ACTIVE CCI_REG16(0xe08e) > +#define REG_MIPI_FORMAT CCI_REG8(0xe096) > +#define REG_MIPI_TX_CTRL CCI_REG8(0xe0b0) > + > +/* Interrupts */ > +#define REG_INT_HDMI CCI_REG8(0xe084) > +#define INT_VIDEO_DISAPPEAR 0x0 > +#define INT_VIDEO_READY 0x1 > + > +#define LT6911UXE_DEFAULT_LANES 4 > +#define LT9611_PAGE_CONTROL 0xff > +#define YUV422_8_BIT 0x7 > + > +static const struct v4l2_dv_timings_cap lt6911uxe_timings_cap_4kp30 = { > + .type = V4L2_DV_BT_656_1120, > + /* Pixel clock from REF_01 p. 20. Min/max height/width are unknown */ > + V4L2_INIT_BT_TIMINGS( here > + 160, 3840, /* min/max width */ > + 120, 2160, /* min/max height */ > + 50000000, 594000000, /* min/max pixelclock */ > + V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | > + V4L2_DV_BT_STD_CVT, > + V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_CUSTOM | > + V4L2_DV_BT_CAP_REDUCED_BLANKING) > +}; > + > +static const struct regmap_range_cfg lt9611uxe_ranges[] = { > + { > + .name = "register_range", > + .range_min = 0, > + .range_max = 0xffff, > + .selector_reg = LT9611_PAGE_CONTROL, > + .selector_mask = 0xff, > + .selector_shift = 0, > + .window_start = 0, > + .window_len = 0x100, > + }, > +}; > + > +static const struct regmap_config lt9611uxe_regmap_config = { > + .reg_bits = 8, > + .val_bits = 8, > + .max_register = 0xffff, > + .ranges = lt9611uxe_ranges, > + .num_ranges = ARRAY_SIZE(lt9611uxe_ranges), > +}; > + > +struct lt6911uxe_mode { > + u32 width; > + u32 height; > + u32 htotal; > + u32 vtotal; > + u32 code; > + u32 fps; > + u32 lanes; > + s64 link_freq; > + u64 pixel_clk; > +}; > + > +struct lt6911uxe { > + struct v4l2_subdev sd; > + struct media_pad pad; > + struct v4l2_ctrl_handler ctrl_handler; > + struct v4l2_ctrl *pixel_rate; > + struct v4l2_dv_timings timings; > + struct lt6911uxe_mode cur_mode; > + struct regmap *regmap; > + struct gpio_desc *reset_gpio; > + struct gpio_desc *irq_gpio; > +}; > + > +static const struct v4l2_event lt6911uxe_ev_source_change = { > + .type = V4L2_EVENT_SOURCE_CHANGE, > + .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION, > +}; > + > +static const struct v4l2_event lt6911uxe_ev_stream_end = { > + .type = V4L2_EVENT_EOS, > +}; > + > +static inline struct lt6911uxe *to_lt6911uxe(struct v4l2_subdev *sd) > +{ > + return container_of(sd, struct lt6911uxe, sd); > +} > + > +static s64 get_pixel_rate(struct lt6911uxe *lt6911uxe) > +{ > + s64 pixel_rate; > + > + pixel_rate = (s64)lt6911uxe->cur_mode.width * > + lt6911uxe->cur_mode.height * > + lt6911uxe->cur_mode.fps * 16; > + do_div(pixel_rate, lt6911uxe->cur_mode.lanes); > + > + return pixel_rate; > +} > + > +static int lt6911uxe_get_detected_timings(struct v4l2_subdev *sd, > + struct v4l2_dv_timings *timings) > +{ > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + struct v4l2_bt_timings *bt = &timings->bt; > + > + memset(timings, 0, sizeof(struct v4l2_dv_timings)); > + > + timings->type = V4L2_DV_BT_656_1120; > + > + bt->width = lt6911uxe->cur_mode.width; > + bt->height = lt6911uxe->cur_mode.height; > + bt->vsync = lt6911uxe->cur_mode.vtotal - lt6911uxe->cur_mode.height; > + bt->hsync = lt6911uxe->cur_mode.htotal - lt6911uxe->cur_mode.width; > + bt->pixelclock = lt6911uxe->cur_mode.pixel_clk; > + > + return 0; > +} > + > +static int lt6911uxe_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, > + struct v4l2_dv_timings *timings) > +{ > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + struct v4l2_subdev_state *state; > + > + state = v4l2_subdev_lock_and_get_active_state(sd); > + if (v4l2_match_dv_timings(<6911uxe->timings, timings, 0, false)) > + return 0; > + > + if (!v4l2_valid_dv_timings(timings, <6911uxe_timings_cap_4kp30, > + NULL, NULL)) { > + v4l2_warn(sd, "timings out of range\n"); > + v4l2_subdev_unlock_state(state); > + return -ERANGE; > + } > + lt6911uxe->timings = *timings; > + v4l2_subdev_unlock_state(state); > + > + return 0; > +} > + > +static int lt6911uxe_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, > + struct v4l2_dv_timings *timings) > +{ > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + struct v4l2_subdev_state *state; > + > + state = v4l2_subdev_lock_and_get_active_state(sd); > + > + *timings = lt6911uxe->timings; > + v4l2_subdev_unlock_state(state); > + > + return 0; > +} > + > +static int lt6911uxe_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, > + struct v4l2_dv_timings *timings) > +{ > + struct v4l2_subdev_state *state; > + int ret; > + > + state = v4l2_subdev_lock_and_get_active_state(sd); > + ret = lt6911uxe_get_detected_timings(sd, timings); > + if (ret) { > + v4l2_subdev_unlock_state(state); > + return ret; > + } > + > + if (!v4l2_valid_dv_timings(timings, <6911uxe_timings_cap_4kp30, > + NULL, NULL)) { > + v4l2_subdev_unlock_state(state); > + return -ERANGE; > + } > + > + v4l2_subdev_unlock_state(state); > + return 0; > +} > + > +static int lt6911uxe_enum_dv_timings(struct v4l2_subdev *sd, > + struct v4l2_enum_dv_timings *timings) > +{ > + return v4l2_enum_dv_timings_cap(timings, > + <6911uxe_timings_cap_4kp30, NULL, NULL); > +} > + > +static int lt6911uxe_dv_timings_cap(struct v4l2_subdev *sd, > + struct v4l2_dv_timings_cap *cap) > +{ > + *cap = lt6911uxe_timings_cap_4kp30; > + return 0; > +} > + > +static int lt6911uxe_status_update(struct lt6911uxe *lt6911uxe) > +{ > + struct i2c_client *client = v4l2_get_subdevdata(<6911uxe->sd); > + u64 int_event; > + u64 byte_clk, half_pix_clk, fps, format; > + u64 half_htotal, vtotal, half_width, height; > + int ret = 0; > + > + /* Read interrupt event */ > + cci_read(lt6911uxe->regmap, REG_INT_HDMI, &int_event, &ret); > + if (ret) { > + dev_err(&client->dev, "failed to read interrupt event: %d\n", > + ret); > + return ret; > + } > + > + switch (int_event) { > + case INT_VIDEO_READY: > + cci_read(lt6911uxe->regmap, REG_BYTE_CLK, &byte_clk, &ret); > + byte_clk *= 1000; > + cci_read(lt6911uxe->regmap, REG_HALF_PIX_CLK, > + &half_pix_clk, &ret); > + half_pix_clk *= 1000; > + > + if (ret || byte_clk == 0 || half_pix_clk == 0) { > + dev_dbg(&client->dev, > + "invalid ByteClock or PixelClock\n"); > + return -EINVAL; > + } > + > + cci_read(lt6911uxe->regmap, REG_HALF_H_TOTAL, > + &half_htotal, &ret); > + cci_read(lt6911uxe->regmap, REG_V_TOTAL, &vtotal, &ret); > + if (ret || half_htotal == 0 || vtotal == 0) { > + dev_dbg(&client->dev, "invalid htotal or vtotal\n"); > + return -EINVAL; > + } > + > + fps = div_u64(half_pix_clk, half_htotal * vtotal); > + if (fps > 60) { > + dev_dbg(&client->dev, > + "max fps is 60, current fps: %llu\n", fps); > + return -EINVAL; > + } > + > + cci_read(lt6911uxe->regmap, REG_HALF_H_ACTIVE, > + &half_width, &ret); > + cci_read(lt6911uxe->regmap, REG_V_ACTIVE, &height, &ret); > + if (ret || half_width == 0 || half_width * 2 > 3840 || > + height == 0 || height > 2160) { > + dev_dbg(&client->dev, "invalid width or height\n"); > + return -EINVAL; > + } > + > + /* > + * Get MIPI format, YUV422_8_BIT is expected in lt6911uxe > + */ > + cci_read(lt6911uxe->regmap, REG_MIPI_FORMAT, &format, &ret); > + if (format != YUV422_8_BIT) { > + dev_dbg(&client->dev, "invalid MIPI format\n"); > + return -EINVAL; > + } > + > + lt6911uxe->cur_mode.height = height; > + lt6911uxe->cur_mode.width = half_width * 2; > + lt6911uxe->cur_mode.fps = fps; > + /* MIPI Clock Rate = ByteClock × 4, defined in lt6911uxe spec */ > + lt6911uxe->cur_mode.link_freq = byte_clk * 4; > + lt6911uxe->cur_mode.pixel_clk = half_pix_clk * 2; > + lt6911uxe->cur_mode.vtotal = vtotal; > + lt6911uxe->cur_mode.htotal = half_htotal * 2; > + break; > + > + case INT_VIDEO_DISAPPEAR: > + cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x0, &ret); > + lt6911uxe->cur_mode.height = 0; > + lt6911uxe->cur_mode.width = 0; > + lt6911uxe->cur_mode.fps = 0; > + lt6911uxe->cur_mode.link_freq = 0; > + break; > + > + default: > + ret = -ENOLINK; > + } > + v4l2_subdev_notify_event(<6911uxe->sd, > + <6911uxe_ev_source_change); and here. Thanks, Dongcheng > + return ret; > +} > + > +static int lt6911uxe_init_controls(struct lt6911uxe *lt6911uxe) > +{ > + struct v4l2_ctrl_handler *ctrl_hdlr; > + s64 pixel_rate; > + int ret; > + > + ctrl_hdlr = <6911uxe->ctrl_handler; > + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); > + if (ret) > + return ret; > + > + pixel_rate = get_pixel_rate(lt6911uxe); > + lt6911uxe->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, NULL, > + V4L2_CID_PIXEL_RATE, > + pixel_rate, pixel_rate, 1, > + pixel_rate); > + > + if (ctrl_hdlr->error) { > + ret = ctrl_hdlr->error; > + goto hdlr_free; > + } > + lt6911uxe->sd.ctrl_handler = ctrl_hdlr; > + > + return 0; > + > +hdlr_free: > + v4l2_ctrl_handler_free(ctrl_hdlr); > + return ret; > +} > + > +static void lt6911uxe_update_pad_format(const struct lt6911uxe_mode *mode, > + struct v4l2_mbus_framefmt *fmt) > +{ > + fmt->width = mode->width; > + fmt->height = mode->height; > + fmt->code = mode->code; > + fmt->field = V4L2_FIELD_NONE; > +} > + > +static int lt6911uxe_enable_streams(struct v4l2_subdev *sd, > + struct v4l2_subdev_state *state, > + u32 pad, u64 streams_mask) > +{ > + struct i2c_client *client = v4l2_get_subdevdata(sd); > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + int ret; > + > + ret = pm_runtime_resume_and_get(&client->dev); > + if (ret < 0) > + return ret; > + > + cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x1, &ret); > + if (ret) { > + dev_err(&client->dev, "failed to start stream: %d\n", ret); > + goto err_rpm_put; > + } > + > + return 0; > + > +err_rpm_put: > + pm_runtime_put(&client->dev); > + return ret; > +} > + > +static int lt6911uxe_disable_streams(struct v4l2_subdev *sd, > + struct v4l2_subdev_state *state, > + u32 pad, u64 streams_mask) > +{ > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + struct i2c_client *client = v4l2_get_subdevdata(<6911uxe->sd); > + int ret; > + > + ret = cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x0, NULL); > + if (ret) > + dev_err(&client->dev, "failed to stop stream: %d\n", ret); > + > + pm_runtime_put(&client->dev); > + return 0; > +} > + > +static int lt6911uxe_set_format(struct v4l2_subdev *sd, > + struct v4l2_subdev_state *sd_state, > + struct v4l2_subdev_format *fmt) > +{ > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + u64 pixel_rate; > + > + lt6911uxe_update_pad_format(<6911uxe->cur_mode, &fmt->format); > + *v4l2_subdev_state_get_format(sd_state, fmt->pad) = fmt->format; > + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) > + return 0; > + > + pixel_rate = get_pixel_rate(lt6911uxe); > + __v4l2_ctrl_modify_range(lt6911uxe->pixel_rate, pixel_rate, > + pixel_rate, 1, pixel_rate); > + > + return 0; > +} > + > +static int lt6911uxe_get_format(struct v4l2_subdev *sd, > + struct v4l2_subdev_state *sd_state, > + struct v4l2_subdev_format *fmt) > +{ > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + > + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) > + fmt->format = *v4l2_subdev_state_get_format(sd_state, fmt->pad); > + else > + lt6911uxe_update_pad_format(<6911uxe->cur_mode, &fmt->format); > + > + return 0; > +} > + > +static int lt6911uxe_enum_mbus_code(struct v4l2_subdev *sd, > + struct v4l2_subdev_state *sd_state, > + struct v4l2_subdev_mbus_code_enum *code) > +{ > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + > + if (code->index) > + return -EINVAL; > + > + code->code = lt6911uxe->cur_mode.code; > + > + return 0; > +} > + > +static int lt6911uxe_get_mbus_config(struct v4l2_subdev *sd, > + unsigned int pad, > + struct v4l2_mbus_config *cfg) > +{ > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + struct v4l2_subdev_state *state; > + > + state = v4l2_subdev_lock_and_get_active_state(sd); > + cfg->type = V4L2_MBUS_CSI2_DPHY; > + cfg->link_freq = lt6911uxe->cur_mode.link_freq; > + v4l2_subdev_unlock_state(state); > + > + return 0; > +} > + > +static int lt6911uxe_init_state(struct v4l2_subdev *sd, > + struct v4l2_subdev_state *sd_state) > +{ > + struct v4l2_subdev_format fmt = { > + .which = sd_state ? V4L2_SUBDEV_FORMAT_TRY > + : V4L2_SUBDEV_FORMAT_ACTIVE, > + }; > + > + return lt6911uxe_set_format(sd, sd_state, &fmt); > +} > + > +static const struct v4l2_subdev_video_ops lt6911uxe_video_ops = { > + .s_stream = v4l2_subdev_s_stream_helper, > +}; > + > +/* > + * lt6911uxe provides editable EDID for customers, but only can be edited like > + * updating flash. Due to this limitation, it is not possible to implement > + * EDID support. > + */ > +static const struct v4l2_subdev_pad_ops lt6911uxe_pad_ops = { > + .set_fmt = lt6911uxe_set_format, > + .get_fmt = lt6911uxe_get_format, > + .enable_streams = lt6911uxe_enable_streams, > + .disable_streams = lt6911uxe_disable_streams, > + .enum_mbus_code = lt6911uxe_enum_mbus_code, > + .get_frame_interval = v4l2_subdev_get_frame_interval, > + .s_dv_timings = lt6911uxe_s_dv_timings, > + .g_dv_timings = lt6911uxe_g_dv_timings, > + .query_dv_timings = lt6911uxe_query_dv_timings, > + .enum_dv_timings = lt6911uxe_enum_dv_timings, > + .dv_timings_cap = lt6911uxe_dv_timings_cap, > + .get_mbus_config = lt6911uxe_get_mbus_config, > +}; > + > +static const struct v4l2_subdev_core_ops lt6911uxe_subdev_core_ops = { > + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, > + .unsubscribe_event = v4l2_event_subdev_unsubscribe, > +}; > + > +static const struct v4l2_subdev_ops lt6911uxe_subdev_ops = { > + .core = <6911uxe_subdev_core_ops, > + .video = <6911uxe_video_ops, > + .pad = <6911uxe_pad_ops, > +}; > + > +static const struct media_entity_operations lt6911uxe_subdev_entity_ops = { > + .link_validate = v4l2_subdev_link_validate, > +}; > + > +static const struct v4l2_subdev_internal_ops lt6911uxe_internal_ops = { > + .init_state = lt6911uxe_init_state, > +}; > + > +static int lt6911uxe_fwnode_parse(struct lt6911uxe *lt6911uxe, > + struct device *dev) > +{ > + struct fwnode_handle *endpoint; > + struct v4l2_fwnode_endpoint bus_cfg = { > + .bus_type = V4L2_MBUS_CSI2_DPHY, > + }; > + int ret; > + > + endpoint = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0, > + FWNODE_GRAPH_ENDPOINT_NEXT); > + if (!endpoint) > + return dev_err_probe(dev, -EPROBE_DEFER, > + "endpoint node not found\n"); > + > + ret = v4l2_fwnode_endpoint_parse(endpoint, &bus_cfg); > + fwnode_handle_put(endpoint); > + if (ret) { > + dev_err(dev, "failed to parse endpoint node: %d\n", ret); > + goto out_err; > + } > + > + /* > + * Check the number of MIPI CSI2 data lanes, > + * lt6911uxe only support 4 lanes. > + */ > + if (bus_cfg.bus.mipi_csi2.num_data_lanes != LT6911UXE_DEFAULT_LANES) { > + dev_err(dev, "only 4 data lanes are currently supported\n"); > + goto out_err; > + } > + lt6911uxe->cur_mode.lanes = bus_cfg.bus.mipi_csi2.num_data_lanes; > + lt6911uxe->cur_mode.code = MEDIA_BUS_FMT_UYVY8_1X16; > + > + return 0; > + > +out_err: > + v4l2_fwnode_endpoint_free(&bus_cfg); > + return ret; > +} > + > +static int lt6911uxe_identify_module(struct lt6911uxe *lt6911uxe, > + struct device *dev) > +{ > + u64 val; > + int ret = 0; > + > + /* Chip ID should be confirmed when the I2C slave is active */ > + cci_write(lt6911uxe->regmap, REG_ENABLE_I2C, 0x1, &ret); > + cci_read(lt6911uxe->regmap, REG_CHIP_ID, &val, &ret); > + cci_write(lt6911uxe->regmap, REG_ENABLE_I2C, 0x0, &ret); > + if (ret) > + return dev_err_probe(dev, ret, "fail to read chip id\n"); > + > + if (val != LT6911UXE_CHIP_ID) { > + return dev_err_probe(dev, -ENXIO, "chip id mismatch: %x!=%x\n", > + LT6911UXE_CHIP_ID, (u16)val); > + } > + > + return 0; > +} > + > +static irqreturn_t lt6911uxe_threaded_irq_fn(int irq, void *dev_id) > +{ > + struct v4l2_subdev *sd = dev_id; > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + struct v4l2_subdev_state *state; > + > + state = v4l2_subdev_lock_and_get_active_state(sd); > + lt6911uxe_status_update(lt6911uxe); > + v4l2_subdev_unlock_state(state); > + > + return IRQ_HANDLED; > +} > + > +static void lt6911uxe_remove(struct i2c_client *client) > +{ > + struct v4l2_subdev *sd = i2c_get_clientdata(client); > + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); > + > + free_irq(gpiod_to_irq(lt6911uxe->irq_gpio), lt6911uxe); > + v4l2_async_unregister_subdev(sd); > + v4l2_subdev_cleanup(sd); > + media_entity_cleanup(&sd->entity); > + v4l2_ctrl_handler_free(<6911uxe->ctrl_handler); > + pm_runtime_disable(&client->dev); > + pm_runtime_set_suspended(&client->dev); > +} > + > +static int lt6911uxe_probe(struct i2c_client *client) > +{ > + struct lt6911uxe *lt6911uxe; > + struct device *dev = &client->dev; > + u64 irq_pin_flags; > + int ret; > + > + lt6911uxe = devm_kzalloc(dev, sizeof(*lt6911uxe), GFP_KERNEL); > + if (!lt6911uxe) > + return -ENOMEM; > + > + lt6911uxe->regmap = devm_regmap_init_i2c(client, > + <9611uxe_regmap_config); > + if (IS_ERR(lt6911uxe->regmap)) > + return dev_err_probe(dev, PTR_ERR(lt6911uxe->regmap), > + "failed to init CCI\n"); > + > + v4l2_i2c_subdev_init(<6911uxe->sd, client, <6911uxe_subdev_ops); > + > + lt6911uxe->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_IN); > + if (IS_ERR(lt6911uxe->reset_gpio)) > + return dev_err_probe(dev, PTR_ERR(lt6911uxe->reset_gpio), > + "failed to get reset gpio\n"); > + > + lt6911uxe->irq_gpio = devm_gpiod_get(dev, "readystat", GPIOD_IN); > + if (IS_ERR(lt6911uxe->irq_gpio)) > + return dev_err_probe(dev, PTR_ERR(lt6911uxe->irq_gpio), > + "failed to get ready_stat gpio\n"); > + > + ret = lt6911uxe_fwnode_parse(lt6911uxe, dev); > + if (ret) > + return ret; > + > + usleep_range(10000, 10500); > + > + ret = lt6911uxe_identify_module(lt6911uxe, dev); > + if (ret) > + return dev_err_probe(dev, ret, "failed to find chip\n"); > + > + ret = lt6911uxe_init_controls(lt6911uxe); > + if (ret) > + return dev_err_probe(dev, ret, "failed to init control\n"); > + > + lt6911uxe->sd.dev = dev; > + lt6911uxe->sd.internal_ops = <6911uxe_internal_ops; > + lt6911uxe->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; > + lt6911uxe->sd.entity.ops = <6911uxe_subdev_entity_ops; > + lt6911uxe->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; > + lt6911uxe->pad.flags = MEDIA_PAD_FL_SOURCE; > + ret = media_entity_pads_init(<6911uxe->sd.entity, 1, <6911uxe->pad); > + if (ret) { > + dev_err(dev, "failed to init entity pads: %d\n", ret); > + goto v4l2_ctrl_handler_free; > + } > + > + /* > + * Device is already turned on by i2c-core with ACPI domain PM. > + * Enable runtime PM and turn off the device. > + */ > + pm_runtime_set_active(dev); > + pm_runtime_enable(dev); > + pm_runtime_idle(dev); > + > + ret = v4l2_subdev_init_finalize(<6911uxe->sd); > + if (ret) { > + dev_err(dev, "failed to init v4l2 subdev: %d\n", ret); > + goto media_entity_cleanup; > + } > + > + /* Setting irq */ > + irq_pin_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | > + IRQF_ONESHOT; > + > + ret = request_threaded_irq(gpiod_to_irq(lt6911uxe->irq_gpio), NULL, > + lt6911uxe_threaded_irq_fn, > + irq_pin_flags, NULL, lt6911uxe); > + if (ret) { > + dev_err(dev, "failed to request IRQ: %d\n", ret); > + goto subdev_cleanup; > + } > + > + ret = v4l2_async_register_subdev_sensor(<6911uxe->sd); > + if (ret) { > + dev_err(dev, "failed to register V4L2 subdev: %d\n", ret); > + goto free_irq; > + } > + > + return 0; > + > +free_irq: > + free_irq(gpiod_to_irq(lt6911uxe->irq_gpio), lt6911uxe); > + > +subdev_cleanup: > + v4l2_subdev_cleanup(<6911uxe->sd); > + > +media_entity_cleanup: > + pm_runtime_disable(dev); > + pm_runtime_set_suspended(dev); > + media_entity_cleanup(<6911uxe->sd.entity); > + > +v4l2_ctrl_handler_free: > + v4l2_ctrl_handler_free(lt6911uxe->sd.ctrl_handler); > + > + return ret; > +} > + > +static const struct acpi_device_id lt6911uxe_acpi_ids[] = { > + { "INTC10C5" }, > + {} > +}; > +MODULE_DEVICE_TABLE(acpi, lt6911uxe_acpi_ids); > + > +static struct i2c_driver lt6911uxe_i2c_driver = { > + .driver = { > + .name = "lt6911uxe", > + .acpi_match_table = ACPI_PTR(lt6911uxe_acpi_ids), > + }, > + .probe = lt6911uxe_probe, > + .remove = lt6911uxe_remove, > +}; > + > +module_i2c_driver(lt6911uxe_i2c_driver); > + > +MODULE_AUTHOR("Yan Dongcheng <dongcheng.yan@intel.com>"); > +MODULE_DESCRIPTION("Lontium lt6911uxe HDMI to MIPI Bridge Driver"); > +MODULE_LICENSE("GPL"); > > base-commit: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2
Hi Dongcheng, kernel test robot noticed the following build errors: [auto build test ERROR on 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2] url: https://github.com/intel-lab-lkp/linux/commits/Dongcheng-Yan/media-i2c-add-lt6911uxe-hdmi-bridge-driver/20250210-141140 base: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2 patch link: https://lore.kernel.org/r/20250210060923.2434047-1-dongcheng.yan%40intel.com patch subject: [PATCH v5] media: i2c: add lt6911uxe hdmi bridge driver config: arm64-allmodconfig (https://download.01.org/0day-ci/archive/20250210/202502102022.iul448ho-lkp@intel.com/config) compiler: clang version 18.1.8 (https://github.com/llvm/llvm-project 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250210/202502102022.iul448ho-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202502102022.iul448ho-lkp@intel.com/ All errors (new ones prefixed by >>): >> drivers/media/i2c/lt6911uxe.c:46:2: error: initialization of non-aggregate type '__u32' (aka 'unsigned int') with a designated initializer list 46 | V4L2_INIT_BT_TIMINGS( | ^~~~~~~~~~~~~~~~~~~~~ 47 | 160, 3840, /* min/max width */ | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 48 | 120, 2160, /* min/max height */ | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 49 | 50000000, 594000000, /* min/max pixelclock */ | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 50 | V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 51 | V4L2_DV_BT_STD_CVT, | ~~~~~~~~~~~~~~~~~~~ 52 | V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_CUSTOM | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 53 | V4L2_DV_BT_CAP_REDUCED_BLANKING) | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/uapi/linux/v4l2-dv-timings.h:17:2: note: expanded from macro 'V4L2_INIT_BT_TIMINGS' 17 | { .bt = { _width , ## args } } | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> drivers/media/i2c/lt6911uxe.c:444:7: error: no member named 'link_freq' in 'struct v4l2_mbus_config' 444 | cfg->link_freq = lt6911uxe->cur_mode.link_freq; | ~~~ ^ 2 errors generated. vim +46 drivers/media/i2c/lt6911uxe.c 42 43 static const struct v4l2_dv_timings_cap lt6911uxe_timings_cap_4kp30 = { 44 .type = V4L2_DV_BT_656_1120, 45 /* Pixel clock from REF_01 p. 20. Min/max height/width are unknown */ > 46 V4L2_INIT_BT_TIMINGS( 47 160, 3840, /* min/max width */ 48 120, 2160, /* min/max height */ 49 50000000, 594000000, /* min/max pixelclock */ 50 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | 51 V4L2_DV_BT_STD_CVT, 52 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_CUSTOM | 53 V4L2_DV_BT_CAP_REDUCED_BLANKING) 54 }; 55
Hi Dongcheng, kernel test robot noticed the following build errors: [auto build test ERROR on 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2] url: https://github.com/intel-lab-lkp/linux/commits/Dongcheng-Yan/media-i2c-add-lt6911uxe-hdmi-bridge-driver/20250210-141140 base: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2 patch link: https://lore.kernel.org/r/20250210060923.2434047-1-dongcheng.yan%40intel.com patch subject: [PATCH v5] media: i2c: add lt6911uxe hdmi bridge driver config: i386-allmodconfig (https://download.01.org/0day-ci/archive/20250210/202502102128.fEu1NOLZ-lkp@intel.com/config) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250210/202502102128.fEu1NOLZ-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202502102128.fEu1NOLZ-lkp@intel.com/ All error/warnings (new ones prefixed by >>): drivers/media/i2c/lt6911uxe.c: In function 'lt6911uxe_get_mbus_config': >> drivers/media/i2c/lt6911uxe.c:444:12: error: 'struct v4l2_mbus_config' has no member named 'link_freq' 444 | cfg->link_freq = lt6911uxe->cur_mode.link_freq; | ^~ drivers/media/i2c/lt6911uxe.c: At top level: >> drivers/media/i2c/lt6911uxe.c:106:32: warning: 'lt6911uxe_ev_stream_end' defined but not used [-Wunused-const-variable=] 106 | static const struct v4l2_event lt6911uxe_ev_stream_end = { | ^~~~~~~~~~~~~~~~~~~~~~~ Kconfig warnings: (for reference only) WARNING: unmet direct dependencies detected for GET_FREE_REGION Depends on [n]: SPARSEMEM [=n] Selected by [m]: - RESOURCE_KUNIT_TEST [=m] && RUNTIME_TESTING_MENU [=y] && KUNIT [=m] vim +444 drivers/media/i2c/lt6911uxe.c 434 435 static int lt6911uxe_get_mbus_config(struct v4l2_subdev *sd, 436 unsigned int pad, 437 struct v4l2_mbus_config *cfg) 438 { 439 struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); 440 struct v4l2_subdev_state *state; 441 442 state = v4l2_subdev_lock_and_get_active_state(sd); 443 cfg->type = V4L2_MBUS_CSI2_DPHY; > 444 cfg->link_freq = lt6911uxe->cur_mode.link_freq; 445 v4l2_subdev_unlock_state(state); 446 447 return 0; 448 } 449
Hi Dongcheng,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2]
url: https://github.com/intel-lab-lkp/linux/commits/Dongcheng-Yan/media-i2c-add-lt6911uxe-hdmi-bridge-driver/20250210-141140
base: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2
patch link: https://lore.kernel.org/r/20250210060923.2434047-1-dongcheng.yan%40intel.com
patch subject: [PATCH v5] media: i2c: add lt6911uxe hdmi bridge driver
config: x86_64-kismet-CONFIG_V4L2_CCI_I2C-CONFIG_VIDEO_LT6911UXE-0-0 (https://download.01.org/0day-ci/archive/20250211/202502110350.ZNdLnsy4-lkp@intel.com/config)
reproduce: (https://download.01.org/0day-ci/archive/20250211/202502110350.ZNdLnsy4-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202502110350.ZNdLnsy4-lkp@intel.com/
kismet warnings: (new ones prefixed by >>)
>> kismet: WARNING: unmet direct dependencies detected for V4L2_CCI_I2C when selected by VIDEO_LT6911UXE
WARNING: unmet direct dependencies detected for V4L2_CCI_I2C
Depends on [n]: MEDIA_SUPPORT [=y] && I2C [=n]
Selected by [y]:
- VIDEO_LT6911UXE [=y] && MEDIA_SUPPORT [=y] && ACPI [=y] && VIDEO_DEV [=y]
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 8ba096b8ebca..fbe3d0fe4ce6 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -1526,6 +1526,18 @@ config VIDEO_I2C To compile this driver as a module, choose M here: the module will be called video-i2c +config VIDEO_LT6911UXE + tristate "Lontium LT6911UXE decoder" + depends on ACPI && VIDEO_DEV + select V4L2_FWNODE + select V4L2_CCI_I2C + help + This is a Video4Linux2 sensor-level driver for the Lontium + LT6911UXE HDMI to MIPI CSI-2 bridge. + + To compile this driver as a module, choose M here: the + module will be called lt6911uxe. + config VIDEO_M52790 tristate "Mitsubishi M52790 A/V switch" depends on VIDEO_DEV && I2C diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index fbb988bd067a..6c23a4463527 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile @@ -64,6 +64,7 @@ obj-$(CONFIG_VIDEO_ISL7998X) += isl7998x.o obj-$(CONFIG_VIDEO_KS0127) += ks0127.o obj-$(CONFIG_VIDEO_LM3560) += lm3560.o obj-$(CONFIG_VIDEO_LM3646) += lm3646.o +obj-$(CONFIG_VIDEO_LT6911UXE) += lt6911uxe.o obj-$(CONFIG_VIDEO_M52790) += m52790.o obj-$(CONFIG_VIDEO_MAX9271_LIB) += max9271.o obj-$(CONFIG_VIDEO_MAX9286) += max9286.o diff --git a/drivers/media/i2c/lt6911uxe.c b/drivers/media/i2c/lt6911uxe.c new file mode 100644 index 000000000000..4f74648e4545 --- /dev/null +++ b/drivers/media/i2c/lt6911uxe.c @@ -0,0 +1,717 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2023 - 2024 Intel Corporation. + +#include <linux/acpi.h> +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/i2c.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/pm_runtime.h> +#include <linux/regmap.h> +#include <linux/v4l2-dv-timings.h> + +#include <media/v4l2-cci.h> +#include <media/v4l2-ctrls.h> +#include <media/v4l2-device.h> +#include <media/v4l2-dv-timings.h> +#include <media/v4l2-event.h> +#include <media/v4l2-fwnode.h> + +#define LT6911UXE_CHIP_ID 0x2102 +#define REG_CHIP_ID CCI_REG16(0xe100) + +#define REG_ENABLE_I2C CCI_REG8(0xe0ee) +#define REG_HALF_PIX_CLK CCI_REG24(0xe085) +#define REG_BYTE_CLK CCI_REG24(0xe092) +#define REG_HALF_H_TOTAL CCI_REG16(0xe088) +#define REG_V_TOTAL CCI_REG16(0xe08a) +#define REG_HALF_H_ACTIVE CCI_REG16(0xe08c) +#define REG_V_ACTIVE CCI_REG16(0xe08e) +#define REG_MIPI_FORMAT CCI_REG8(0xe096) +#define REG_MIPI_TX_CTRL CCI_REG8(0xe0b0) + +/* Interrupts */ +#define REG_INT_HDMI CCI_REG8(0xe084) +#define INT_VIDEO_DISAPPEAR 0x0 +#define INT_VIDEO_READY 0x1 + +#define LT6911UXE_DEFAULT_LANES 4 +#define LT9611_PAGE_CONTROL 0xff +#define YUV422_8_BIT 0x7 + +static const struct v4l2_dv_timings_cap lt6911uxe_timings_cap_4kp30 = { + .type = V4L2_DV_BT_656_1120, + /* Pixel clock from REF_01 p. 20. Min/max height/width are unknown */ + V4L2_INIT_BT_TIMINGS( + 160, 3840, /* min/max width */ + 120, 2160, /* min/max height */ + 50000000, 594000000, /* min/max pixelclock */ + V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | + V4L2_DV_BT_STD_CVT, + V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_CUSTOM | + V4L2_DV_BT_CAP_REDUCED_BLANKING) +}; + +static const struct regmap_range_cfg lt9611uxe_ranges[] = { + { + .name = "register_range", + .range_min = 0, + .range_max = 0xffff, + .selector_reg = LT9611_PAGE_CONTROL, + .selector_mask = 0xff, + .selector_shift = 0, + .window_start = 0, + .window_len = 0x100, + }, +}; + +static const struct regmap_config lt9611uxe_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xffff, + .ranges = lt9611uxe_ranges, + .num_ranges = ARRAY_SIZE(lt9611uxe_ranges), +}; + +struct lt6911uxe_mode { + u32 width; + u32 height; + u32 htotal; + u32 vtotal; + u32 code; + u32 fps; + u32 lanes; + s64 link_freq; + u64 pixel_clk; +}; + +struct lt6911uxe { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_ctrl_handler ctrl_handler; + struct v4l2_ctrl *pixel_rate; + struct v4l2_dv_timings timings; + struct lt6911uxe_mode cur_mode; + struct regmap *regmap; + struct gpio_desc *reset_gpio; + struct gpio_desc *irq_gpio; +}; + +static const struct v4l2_event lt6911uxe_ev_source_change = { + .type = V4L2_EVENT_SOURCE_CHANGE, + .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION, +}; + +static const struct v4l2_event lt6911uxe_ev_stream_end = { + .type = V4L2_EVENT_EOS, +}; + +static inline struct lt6911uxe *to_lt6911uxe(struct v4l2_subdev *sd) +{ + return container_of(sd, struct lt6911uxe, sd); +} + +static s64 get_pixel_rate(struct lt6911uxe *lt6911uxe) +{ + s64 pixel_rate; + + pixel_rate = (s64)lt6911uxe->cur_mode.width * + lt6911uxe->cur_mode.height * + lt6911uxe->cur_mode.fps * 16; + do_div(pixel_rate, lt6911uxe->cur_mode.lanes); + + return pixel_rate; +} + +static int lt6911uxe_get_detected_timings(struct v4l2_subdev *sd, + struct v4l2_dv_timings *timings) +{ + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + struct v4l2_bt_timings *bt = &timings->bt; + + memset(timings, 0, sizeof(struct v4l2_dv_timings)); + + timings->type = V4L2_DV_BT_656_1120; + + bt->width = lt6911uxe->cur_mode.width; + bt->height = lt6911uxe->cur_mode.height; + bt->vsync = lt6911uxe->cur_mode.vtotal - lt6911uxe->cur_mode.height; + bt->hsync = lt6911uxe->cur_mode.htotal - lt6911uxe->cur_mode.width; + bt->pixelclock = lt6911uxe->cur_mode.pixel_clk; + + return 0; +} + +static int lt6911uxe_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) +{ + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + struct v4l2_subdev_state *state; + + state = v4l2_subdev_lock_and_get_active_state(sd); + if (v4l2_match_dv_timings(<6911uxe->timings, timings, 0, false)) + return 0; + + if (!v4l2_valid_dv_timings(timings, <6911uxe_timings_cap_4kp30, + NULL, NULL)) { + v4l2_warn(sd, "timings out of range\n"); + v4l2_subdev_unlock_state(state); + return -ERANGE; + } + lt6911uxe->timings = *timings; + v4l2_subdev_unlock_state(state); + + return 0; +} + +static int lt6911uxe_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) +{ + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + struct v4l2_subdev_state *state; + + state = v4l2_subdev_lock_and_get_active_state(sd); + + *timings = lt6911uxe->timings; + v4l2_subdev_unlock_state(state); + + return 0; +} + +static int lt6911uxe_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) +{ + struct v4l2_subdev_state *state; + int ret; + + state = v4l2_subdev_lock_and_get_active_state(sd); + ret = lt6911uxe_get_detected_timings(sd, timings); + if (ret) { + v4l2_subdev_unlock_state(state); + return ret; + } + + if (!v4l2_valid_dv_timings(timings, <6911uxe_timings_cap_4kp30, + NULL, NULL)) { + v4l2_subdev_unlock_state(state); + return -ERANGE; + } + + v4l2_subdev_unlock_state(state); + return 0; +} + +static int lt6911uxe_enum_dv_timings(struct v4l2_subdev *sd, + struct v4l2_enum_dv_timings *timings) +{ + return v4l2_enum_dv_timings_cap(timings, + <6911uxe_timings_cap_4kp30, NULL, NULL); +} + +static int lt6911uxe_dv_timings_cap(struct v4l2_subdev *sd, + struct v4l2_dv_timings_cap *cap) +{ + *cap = lt6911uxe_timings_cap_4kp30; + return 0; +} + +static int lt6911uxe_status_update(struct lt6911uxe *lt6911uxe) +{ + struct i2c_client *client = v4l2_get_subdevdata(<6911uxe->sd); + u64 int_event; + u64 byte_clk, half_pix_clk, fps, format; + u64 half_htotal, vtotal, half_width, height; + int ret = 0; + + /* Read interrupt event */ + cci_read(lt6911uxe->regmap, REG_INT_HDMI, &int_event, &ret); + if (ret) { + dev_err(&client->dev, "failed to read interrupt event: %d\n", + ret); + return ret; + } + + switch (int_event) { + case INT_VIDEO_READY: + cci_read(lt6911uxe->regmap, REG_BYTE_CLK, &byte_clk, &ret); + byte_clk *= 1000; + cci_read(lt6911uxe->regmap, REG_HALF_PIX_CLK, + &half_pix_clk, &ret); + half_pix_clk *= 1000; + + if (ret || byte_clk == 0 || half_pix_clk == 0) { + dev_dbg(&client->dev, + "invalid ByteClock or PixelClock\n"); + return -EINVAL; + } + + cci_read(lt6911uxe->regmap, REG_HALF_H_TOTAL, + &half_htotal, &ret); + cci_read(lt6911uxe->regmap, REG_V_TOTAL, &vtotal, &ret); + if (ret || half_htotal == 0 || vtotal == 0) { + dev_dbg(&client->dev, "invalid htotal or vtotal\n"); + return -EINVAL; + } + + fps = div_u64(half_pix_clk, half_htotal * vtotal); + if (fps > 60) { + dev_dbg(&client->dev, + "max fps is 60, current fps: %llu\n", fps); + return -EINVAL; + } + + cci_read(lt6911uxe->regmap, REG_HALF_H_ACTIVE, + &half_width, &ret); + cci_read(lt6911uxe->regmap, REG_V_ACTIVE, &height, &ret); + if (ret || half_width == 0 || half_width * 2 > 3840 || + height == 0 || height > 2160) { + dev_dbg(&client->dev, "invalid width or height\n"); + return -EINVAL; + } + + /* + * Get MIPI format, YUV422_8_BIT is expected in lt6911uxe + */ + cci_read(lt6911uxe->regmap, REG_MIPI_FORMAT, &format, &ret); + if (format != YUV422_8_BIT) { + dev_dbg(&client->dev, "invalid MIPI format\n"); + return -EINVAL; + } + + lt6911uxe->cur_mode.height = height; + lt6911uxe->cur_mode.width = half_width * 2; + lt6911uxe->cur_mode.fps = fps; + /* MIPI Clock Rate = ByteClock × 4, defined in lt6911uxe spec */ + lt6911uxe->cur_mode.link_freq = byte_clk * 4; + lt6911uxe->cur_mode.pixel_clk = half_pix_clk * 2; + lt6911uxe->cur_mode.vtotal = vtotal; + lt6911uxe->cur_mode.htotal = half_htotal * 2; + break; + + case INT_VIDEO_DISAPPEAR: + cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x0, &ret); + lt6911uxe->cur_mode.height = 0; + lt6911uxe->cur_mode.width = 0; + lt6911uxe->cur_mode.fps = 0; + lt6911uxe->cur_mode.link_freq = 0; + break; + + default: + ret = -ENOLINK; + } + v4l2_subdev_notify_event(<6911uxe->sd, + <6911uxe_ev_source_change); + return ret; +} + +static int lt6911uxe_init_controls(struct lt6911uxe *lt6911uxe) +{ + struct v4l2_ctrl_handler *ctrl_hdlr; + s64 pixel_rate; + int ret; + + ctrl_hdlr = <6911uxe->ctrl_handler; + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); + if (ret) + return ret; + + pixel_rate = get_pixel_rate(lt6911uxe); + lt6911uxe->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, NULL, + V4L2_CID_PIXEL_RATE, + pixel_rate, pixel_rate, 1, + pixel_rate); + + if (ctrl_hdlr->error) { + ret = ctrl_hdlr->error; + goto hdlr_free; + } + lt6911uxe->sd.ctrl_handler = ctrl_hdlr; + + return 0; + +hdlr_free: + v4l2_ctrl_handler_free(ctrl_hdlr); + return ret; +} + +static void lt6911uxe_update_pad_format(const struct lt6911uxe_mode *mode, + struct v4l2_mbus_framefmt *fmt) +{ + fmt->width = mode->width; + fmt->height = mode->height; + fmt->code = mode->code; + fmt->field = V4L2_FIELD_NONE; +} + +static int lt6911uxe_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + u32 pad, u64 streams_mask) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + int ret; + + ret = pm_runtime_resume_and_get(&client->dev); + if (ret < 0) + return ret; + + cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x1, &ret); + if (ret) { + dev_err(&client->dev, "failed to start stream: %d\n", ret); + goto err_rpm_put; + } + + return 0; + +err_rpm_put: + pm_runtime_put(&client->dev); + return ret; +} + +static int lt6911uxe_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + u32 pad, u64 streams_mask) +{ + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + struct i2c_client *client = v4l2_get_subdevdata(<6911uxe->sd); + int ret; + + ret = cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x0, NULL); + if (ret) + dev_err(&client->dev, "failed to stop stream: %d\n", ret); + + pm_runtime_put(&client->dev); + return 0; +} + +static int lt6911uxe_set_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *fmt) +{ + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + u64 pixel_rate; + + lt6911uxe_update_pad_format(<6911uxe->cur_mode, &fmt->format); + *v4l2_subdev_state_get_format(sd_state, fmt->pad) = fmt->format; + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) + return 0; + + pixel_rate = get_pixel_rate(lt6911uxe); + __v4l2_ctrl_modify_range(lt6911uxe->pixel_rate, pixel_rate, + pixel_rate, 1, pixel_rate); + + return 0; +} + +static int lt6911uxe_get_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *fmt) +{ + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) + fmt->format = *v4l2_subdev_state_get_format(sd_state, fmt->pad); + else + lt6911uxe_update_pad_format(<6911uxe->cur_mode, &fmt->format); + + return 0; +} + +static int lt6911uxe_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + + if (code->index) + return -EINVAL; + + code->code = lt6911uxe->cur_mode.code; + + return 0; +} + +static int lt6911uxe_get_mbus_config(struct v4l2_subdev *sd, + unsigned int pad, + struct v4l2_mbus_config *cfg) +{ + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + struct v4l2_subdev_state *state; + + state = v4l2_subdev_lock_and_get_active_state(sd); + cfg->type = V4L2_MBUS_CSI2_DPHY; + cfg->link_freq = lt6911uxe->cur_mode.link_freq; + v4l2_subdev_unlock_state(state); + + return 0; +} + +static int lt6911uxe_init_state(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state) +{ + struct v4l2_subdev_format fmt = { + .which = sd_state ? V4L2_SUBDEV_FORMAT_TRY + : V4L2_SUBDEV_FORMAT_ACTIVE, + }; + + return lt6911uxe_set_format(sd, sd_state, &fmt); +} + +static const struct v4l2_subdev_video_ops lt6911uxe_video_ops = { + .s_stream = v4l2_subdev_s_stream_helper, +}; + +/* + * lt6911uxe provides editable EDID for customers, but only can be edited like + * updating flash. Due to this limitation, it is not possible to implement + * EDID support. + */ +static const struct v4l2_subdev_pad_ops lt6911uxe_pad_ops = { + .set_fmt = lt6911uxe_set_format, + .get_fmt = lt6911uxe_get_format, + .enable_streams = lt6911uxe_enable_streams, + .disable_streams = lt6911uxe_disable_streams, + .enum_mbus_code = lt6911uxe_enum_mbus_code, + .get_frame_interval = v4l2_subdev_get_frame_interval, + .s_dv_timings = lt6911uxe_s_dv_timings, + .g_dv_timings = lt6911uxe_g_dv_timings, + .query_dv_timings = lt6911uxe_query_dv_timings, + .enum_dv_timings = lt6911uxe_enum_dv_timings, + .dv_timings_cap = lt6911uxe_dv_timings_cap, + .get_mbus_config = lt6911uxe_get_mbus_config, +}; + +static const struct v4l2_subdev_core_ops lt6911uxe_subdev_core_ops = { + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_ops lt6911uxe_subdev_ops = { + .core = <6911uxe_subdev_core_ops, + .video = <6911uxe_video_ops, + .pad = <6911uxe_pad_ops, +}; + +static const struct media_entity_operations lt6911uxe_subdev_entity_ops = { + .link_validate = v4l2_subdev_link_validate, +}; + +static const struct v4l2_subdev_internal_ops lt6911uxe_internal_ops = { + .init_state = lt6911uxe_init_state, +}; + +static int lt6911uxe_fwnode_parse(struct lt6911uxe *lt6911uxe, + struct device *dev) +{ + struct fwnode_handle *endpoint; + struct v4l2_fwnode_endpoint bus_cfg = { + .bus_type = V4L2_MBUS_CSI2_DPHY, + }; + int ret; + + endpoint = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0, + FWNODE_GRAPH_ENDPOINT_NEXT); + if (!endpoint) + return dev_err_probe(dev, -EPROBE_DEFER, + "endpoint node not found\n"); + + ret = v4l2_fwnode_endpoint_parse(endpoint, &bus_cfg); + fwnode_handle_put(endpoint); + if (ret) { + dev_err(dev, "failed to parse endpoint node: %d\n", ret); + goto out_err; + } + + /* + * Check the number of MIPI CSI2 data lanes, + * lt6911uxe only support 4 lanes. + */ + if (bus_cfg.bus.mipi_csi2.num_data_lanes != LT6911UXE_DEFAULT_LANES) { + dev_err(dev, "only 4 data lanes are currently supported\n"); + goto out_err; + } + lt6911uxe->cur_mode.lanes = bus_cfg.bus.mipi_csi2.num_data_lanes; + lt6911uxe->cur_mode.code = MEDIA_BUS_FMT_UYVY8_1X16; + + return 0; + +out_err: + v4l2_fwnode_endpoint_free(&bus_cfg); + return ret; +} + +static int lt6911uxe_identify_module(struct lt6911uxe *lt6911uxe, + struct device *dev) +{ + u64 val; + int ret = 0; + + /* Chip ID should be confirmed when the I2C slave is active */ + cci_write(lt6911uxe->regmap, REG_ENABLE_I2C, 0x1, &ret); + cci_read(lt6911uxe->regmap, REG_CHIP_ID, &val, &ret); + cci_write(lt6911uxe->regmap, REG_ENABLE_I2C, 0x0, &ret); + if (ret) + return dev_err_probe(dev, ret, "fail to read chip id\n"); + + if (val != LT6911UXE_CHIP_ID) { + return dev_err_probe(dev, -ENXIO, "chip id mismatch: %x!=%x\n", + LT6911UXE_CHIP_ID, (u16)val); + } + + return 0; +} + +static irqreturn_t lt6911uxe_threaded_irq_fn(int irq, void *dev_id) +{ + struct v4l2_subdev *sd = dev_id; + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + struct v4l2_subdev_state *state; + + state = v4l2_subdev_lock_and_get_active_state(sd); + lt6911uxe_status_update(lt6911uxe); + v4l2_subdev_unlock_state(state); + + return IRQ_HANDLED; +} + +static void lt6911uxe_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd); + + free_irq(gpiod_to_irq(lt6911uxe->irq_gpio), lt6911uxe); + v4l2_async_unregister_subdev(sd); + v4l2_subdev_cleanup(sd); + media_entity_cleanup(&sd->entity); + v4l2_ctrl_handler_free(<6911uxe->ctrl_handler); + pm_runtime_disable(&client->dev); + pm_runtime_set_suspended(&client->dev); +} + +static int lt6911uxe_probe(struct i2c_client *client) +{ + struct lt6911uxe *lt6911uxe; + struct device *dev = &client->dev; + u64 irq_pin_flags; + int ret; + + lt6911uxe = devm_kzalloc(dev, sizeof(*lt6911uxe), GFP_KERNEL); + if (!lt6911uxe) + return -ENOMEM; + + lt6911uxe->regmap = devm_regmap_init_i2c(client, + <9611uxe_regmap_config); + if (IS_ERR(lt6911uxe->regmap)) + return dev_err_probe(dev, PTR_ERR(lt6911uxe->regmap), + "failed to init CCI\n"); + + v4l2_i2c_subdev_init(<6911uxe->sd, client, <6911uxe_subdev_ops); + + lt6911uxe->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_IN); + if (IS_ERR(lt6911uxe->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(lt6911uxe->reset_gpio), + "failed to get reset gpio\n"); + + lt6911uxe->irq_gpio = devm_gpiod_get(dev, "readystat", GPIOD_IN); + if (IS_ERR(lt6911uxe->irq_gpio)) + return dev_err_probe(dev, PTR_ERR(lt6911uxe->irq_gpio), + "failed to get ready_stat gpio\n"); + + ret = lt6911uxe_fwnode_parse(lt6911uxe, dev); + if (ret) + return ret; + + usleep_range(10000, 10500); + + ret = lt6911uxe_identify_module(lt6911uxe, dev); + if (ret) + return dev_err_probe(dev, ret, "failed to find chip\n"); + + ret = lt6911uxe_init_controls(lt6911uxe); + if (ret) + return dev_err_probe(dev, ret, "failed to init control\n"); + + lt6911uxe->sd.dev = dev; + lt6911uxe->sd.internal_ops = <6911uxe_internal_ops; + lt6911uxe->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + lt6911uxe->sd.entity.ops = <6911uxe_subdev_entity_ops; + lt6911uxe->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + lt6911uxe->pad.flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(<6911uxe->sd.entity, 1, <6911uxe->pad); + if (ret) { + dev_err(dev, "failed to init entity pads: %d\n", ret); + goto v4l2_ctrl_handler_free; + } + + /* + * Device is already turned on by i2c-core with ACPI domain PM. + * Enable runtime PM and turn off the device. + */ + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + pm_runtime_idle(dev); + + ret = v4l2_subdev_init_finalize(<6911uxe->sd); + if (ret) { + dev_err(dev, "failed to init v4l2 subdev: %d\n", ret); + goto media_entity_cleanup; + } + + /* Setting irq */ + irq_pin_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | + IRQF_ONESHOT; + + ret = request_threaded_irq(gpiod_to_irq(lt6911uxe->irq_gpio), NULL, + lt6911uxe_threaded_irq_fn, + irq_pin_flags, NULL, lt6911uxe); + if (ret) { + dev_err(dev, "failed to request IRQ: %d\n", ret); + goto subdev_cleanup; + } + + ret = v4l2_async_register_subdev_sensor(<6911uxe->sd); + if (ret) { + dev_err(dev, "failed to register V4L2 subdev: %d\n", ret); + goto free_irq; + } + + return 0; + +free_irq: + free_irq(gpiod_to_irq(lt6911uxe->irq_gpio), lt6911uxe); + +subdev_cleanup: + v4l2_subdev_cleanup(<6911uxe->sd); + +media_entity_cleanup: + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); + media_entity_cleanup(<6911uxe->sd.entity); + +v4l2_ctrl_handler_free: + v4l2_ctrl_handler_free(lt6911uxe->sd.ctrl_handler); + + return ret; +} + +static const struct acpi_device_id lt6911uxe_acpi_ids[] = { + { "INTC10C5" }, + {} +}; +MODULE_DEVICE_TABLE(acpi, lt6911uxe_acpi_ids); + +static struct i2c_driver lt6911uxe_i2c_driver = { + .driver = { + .name = "lt6911uxe", + .acpi_match_table = ACPI_PTR(lt6911uxe_acpi_ids), + }, + .probe = lt6911uxe_probe, + .remove = lt6911uxe_remove, +}; + +module_i2c_driver(lt6911uxe_i2c_driver); + +MODULE_AUTHOR("Yan Dongcheng <dongcheng.yan@intel.com>"); +MODULE_DESCRIPTION("Lontium lt6911uxe HDMI to MIPI Bridge Driver"); +MODULE_LICENSE("GPL");
Lontium LT9611UXE is a HDMI to MIPI CSI-2 bridge, It supports modes up to 4k60fps, switches current mode when plugging HDMI or changing the source active signal mode. Signed-off-by: Dongcheng Yan <dongcheng.yan@intel.com> --- v1 -> v2: replaced mutex with state_lock v2 -> v3: fixed some pm_runtime err handlings v3 -> v4: add dv_timings api v4 -> v5: use get_mbus_config to replace link_freq v4l2_ctrl_handler rm lt6911uxe_enum_frame_size & lt6911uxe_enum_frame_interval patch has been tested with Intel IPU isp. --- drivers/media/i2c/Kconfig | 12 + drivers/media/i2c/Makefile | 1 + drivers/media/i2c/lt6911uxe.c | 717 ++++++++++++++++++++++++++++++++++ 3 files changed, 730 insertions(+) create mode 100644 drivers/media/i2c/lt6911uxe.c base-commit: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2