@@ -1815,9 +1815,8 @@ static u16 MXL_BlockInit(struct dvb_frontend *fe)
/* Charge Pump Control Dig Ana */
status += MXL_ControlWrite(fe, RFSYN_CHP_GAIN, state->Mode ? 5 : 8);
- status += MXL_ControlWrite(fe,
- RFSYN_EN_CHP_HIGAIN, state->Mode ? 1 : 1);
- status += MXL_ControlWrite(fe, EN_CHP_LIN_B, state->Mode ? 0 : 0);
+ status += MXL_ControlWrite(fe, RFSYN_EN_CHP_HIGAIN, 1);
+ status += MXL_ControlWrite(fe, EN_CHP_LIN_B, 0);
/* AGC TOP Control */
if (state->AGC_Mode == 0) /* Dual AGC */ {
@@ -2161,7 +2160,7 @@ static u16 MXL_IFSynthInit(struct dvb_frontend *fe)
}
}
- if (state->Mode || (state->Mode == 0 && state->IF_Mode == 0)) {
+ if (state->Mode || state->IF_Mode == 0) {
if (state->IF_LO == 57000000UL) {
status += MXL_ControlWrite(fe, IF_DIVVAL, 0x10);
status += MXL_ControlWrite(fe, IF_VCO_BIAS, 0x08);