diff mbox

mt9m001: fix advertised pixel clock polarity

Message ID Pine.LNX.4.64.0903301654000.4455@axis700.grange (mailing list archive)
State RFC
Headers show

Commit Message

Guennadi Liakhovetski March 30, 2009, 2:55 p.m. UTC
MT9M001 datasheet says, that the data is ready on the falling edge of the pixel
clock, but the driver wrongly sets the SOCAM_PCLK_SAMPLE_RISING flag. Changing
this doesn't seem to produce any visible difference, still, it is better to
comply to the datasheet.

Reported-by: Sascha Oppermann <oppermann@garage-computers.com>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---

Objections?

 drivers/media/video/mt9m001.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
diff mbox

Patch

diff --git a/drivers/media/video/mt9m001.c b/drivers/media/video/mt9m001.c
index fa7e509..684f62f 100644
--- a/drivers/media/video/mt9m001.c
+++ b/drivers/media/video/mt9m001.c
@@ -207,7 +207,7 @@  static unsigned long mt9m001_query_bus_param(struct soc_camera_device *icd)
 	struct mt9m001 *mt9m001 = container_of(icd, struct mt9m001, icd);
 	struct soc_camera_link *icl = mt9m001->client->dev.platform_data;
 	/* MT9M001 has all capture_format parameters fixed */
-	unsigned long flags = SOCAM_PCLK_SAMPLE_RISING |
+	unsigned long flags = SOCAM_PCLK_SAMPLE_FALLING |
 		SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |
 		SOCAM_DATA_ACTIVE_HIGH | SOCAM_MASTER;