From patchwork Fri Jul 23 08:13:37 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 113854 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o6N8DVMS020408 for ; Fri, 23 Jul 2010 08:13:32 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751990Ab0GWIN3 (ORCPT ); Fri, 23 Jul 2010 04:13:29 -0400 Received: from mailout-de.gmx.net ([213.165.64.23]:55542 "HELO mail.gmx.net" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with SMTP id S1751756Ab0GWIN1 (ORCPT ); Fri, 23 Jul 2010 04:13:27 -0400 Received: (qmail invoked by alias); 23 Jul 2010 08:13:26 -0000 Received: from p57BD15A1.dip0.t-ipconnect.de (EHLO axis700.grange) [87.189.21.161] by mail.gmx.net (mp007) with SMTP; 23 Jul 2010 10:13:26 +0200 X-Authenticated: #20450766 X-Provags-ID: V01U2FsdGVkX1+HWoZrvQWHEnLtvpYhbvGoGqPoklk0BNn22ij+Cd Jbd823IVMesBEh Received: from lyakh (helo=localhost) by axis700.grange with local-esmtp (Exim 4.63) (envelope-from ) id 1OcDNx-0001L9-6b; Fri, 23 Jul 2010 10:13:37 +0200 Date: Fri, 23 Jul 2010 10:13:37 +0200 (CEST) From: Guennadi Liakhovetski To: Linux Media Mailing List cc: Hans Verkuil , Laurent Pinchart Subject: [PATCH] mediabus: add MIPI CSI-2 pixel format codes Message-ID: MIME-Version: 1.0 X-Y-GMX-Trusted: 0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 23 Jul 2010 08:13:32 +0000 (UTC) diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h index a870965..b0dcace 100644 --- a/include/media/v4l2-mediabus.h +++ b/include/media/v4l2-mediabus.h @@ -41,6 +41,32 @@ enum v4l2_mbus_pixelcode { V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_MBUS_FMT_SGRBG8_1X8, + /* MIPI CSI-2 codes */ + V4L2_MBUS_FMT_MIPI_CSI2_YUV420_8_L, + V4L2_MBUS_FMT_MIPI_CSI2_YUV420_8, + V4L2_MBUS_FMT_MIPI_CSI2_YUV420_10, + V4L2_MBUS_FMT_MIPI_CSI2_YUV420_8_CSPS, + V4L2_MBUS_FMT_MIPI_CSI2_YUV420_10_CSPS, + V4L2_MBUS_FMT_MIPI_CSI2_YUV422_8, + V4L2_MBUS_FMT_MIPI_CSI2_YUV422_10, + V4L2_MBUS_FMT_MIPI_CSI2_RGB888, + V4L2_MBUS_FMT_MIPI_CSI2_RGB666, + V4L2_MBUS_FMT_MIPI_CSI2_RGB565, + V4L2_MBUS_FMT_MIPI_CSI2_RGB555, + V4L2_MBUS_FMT_MIPI_CSI2_RGB444, + V4L2_MBUS_FMT_MIPI_CSI2_RAW6, + V4L2_MBUS_FMT_MIPI_CSI2_RAW7, + V4L2_MBUS_FMT_MIPI_CSI2_RAW8, + V4L2_MBUS_FMT_MIPI_CSI2_RAW10, + V4L2_MBUS_FMT_MIPI_CSI2_RAW12, + V4L2_MBUS_FMT_MIPI_CSI2_RAW14, + V4L2_MBUS_FMT_MIPI_CSI2_GEN_NULL, + V4L2_MBUS_FMT_MIPI_CSI2_GEN_BLANKING, + V4L2_MBUS_FMT_MIPI_CSI2_GEN_EMBEDDED8, + V4L2_MBUS_FMT_MIPI_CSI2_USER_1, + V4L2_MBUS_FMT_MIPI_CSI2_USER_2, + V4L2_MBUS_FMT_MIPI_CSI2_USER_3, + V4L2_MBUS_FMT_MIPI_CSI2_USER_4, }; /**