@@ -69,11 +69,15 @@
* @V4L2_MBUS_PARALLEL: parallel interface with hsync and vsync
* @V4L2_MBUS_BT656: parallel interface with embedded synchronisation, can
* also be used for BT.1120
+ * @V4L2_MBUS_CSI1: MIPI CSI-1 serial interface
+ * @V4L2_MBUS_CCP2: CCP2 (Compact Camera Port 2)
* @V4L2_MBUS_CSI2: MIPI CSI-2 serial interface
*/
enum v4l2_mbus_type {
V4L2_MBUS_PARALLEL,
V4L2_MBUS_BT656,
+ V4L2_MBUS_CSI1,
+ V4L2_MBUS_CCP2,
V4L2_MBUS_CSI2,
};
@@ -53,6 +53,22 @@ struct v4l2_of_bus_parallel {
};
/**
+ * struct v4l2_of_bus_csi1 - CSI-1/CCP2 data bus structure
+ * @clock_inv: polarity of clock/strobe signal
+ * false - not inverted, true - inverted
+ * @strobe: false - data/clock, true - data/strobe
+ * @data_lane: the number of the data lane
+ * @clock_lane: the number of the clock lane
+ */
+struct v4l2_of_bus_mipi_csi1 {
+ bool clock_inv;
+ bool strobe;
+ bool lane_polarity[2];
+ unsigned char data_lane;
+ unsigned char clock_lane;
+};
+
+/**
* struct v4l2_of_endpoint - the endpoint data structure
* @base: struct of_endpoint containing port, id, and local of_node
* @bus_type: bus type
@@ -66,6 +82,7 @@ struct v4l2_of_endpoint {
enum v4l2_mbus_type bus_type;
union {
struct v4l2_of_bus_parallel parallel;
+ struct v4l2_of_bus_mipi_csi1 mipi_csi1;
struct v4l2_of_bus_mipi_csi2 mipi_csi2;
} bus;
u64 *link_frequencies;