mbox series

[v6,0/4] Spilt PCIe node to comply with hardware design

Message ID 20200914112659.7091-1-chuanjia.liu@mediatek.com (mailing list archive)
Headers show
Series Spilt PCIe node to comply with hardware design | expand

Message

Chuanjia Liu Sept. 14, 2020, 11:26 a.m. UTC 
Split the PCIe node for MT2712 and MT7622 platform to fix MSI issue
and comply with the hardware design.

change note:
  v6:Fix yaml error. Make sure driver compatible with old and 
     new DTS format.
  v5:rebase for 5.9-rc1, no code change. 
  v4:change commit message due to bayes statistical bogofilter
     considers this series patch SPAM.
  v3:rebase for 5.8-rc1. Only collect ack of Ryder, No code change.
  v2:change the allocation of MT2712 PCIe MMIO space due to the
     allocation size is not right in v1.

Chuanjia Liu (4):
 dt-bindings: pci: mediatek: Modified the Device tree bindings
 PCI: mediatek: Add new method to get shared pcie-cfg base and irq
 arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622
 ARM: dts: mediatek: Modified MT7629 PCIe node

 .../bindings/pci/mediatek-pcie-cfg.yaml       |  37 +++++
 .../devicetree/bindings/pci/mediatek-pcie.txt | 139 +++++++++++-------
 arch/arm/boot/dts/mt7629-rfb.dts              |   3 +-
 arch/arm/boot/dts/mt7629.dtsi                 |  22 +--
 arch/arm64/boot/dts/mediatek/mt2712e.dtsi     |  75 ++++++----
 .../dts/mediatek/mt7622-bananapi-bpi-r64.dts  |  16 +-
 arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts  |   6 +-
 arch/arm64/boot/dts/mediatek/mt7622.dtsi      |  66 ++++++---
 drivers/pci/controller/pcie-mediatek.c        |  23 ++-
 9 files changed, 253 insertions(+), 134 deletions(-)

Comments

Frank Wunderlich Sept. 14, 2020, 11:39 a.m. UTC | #1 
> Betreff: [PATCH v6 0/4] Spilt PCIe node to comply with hardware design

just if you need to make another version (as it is only the cover-letter) you can fix the typo in subject ;)

regards Frank
Chuanjia Liu Sept. 28, 2020, 3:25 a.m. UTC | #2 
On Mon, 2020-09-14 at 13:39 +0200, Frank Wunderlich wrote:
> > Betreff: [PATCH v6 0/4] Spilt PCIe node to comply with hardware design
> 
> just if you need to make another version (as it is only the cover-letter) you can fix the typo in subject ;)

Thanks for your reminding, I will change it in the next version.
> 
> regards Frank
>