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[v5,0/3] introduce TI reset controller for MT8192 SoC

Message ID 20200929134642.26561-1-crystal.guo@mediatek.com (mailing list archive)
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Series introduce TI reset controller for MT8192 SoC | expand

Message

Crystal Guo Sept. 29, 2020, 1:46 p.m. UTC 
v5:
1. revert ti-syscon-reset.txt, and add a new mediatek reset binding.
2. split the patch [v4, 3/4] with the change to force write and the
change to integrate assert and deassert together.
3. separate the dts patch from this patch sets

v4:
fix typos on v3 commit message.

v3:
1. revert v2 changes.
2. add 'reset-duration-us' property to declare a minimum delay,
which needs to be waited between assert and deassert.
3. add 'mediatek,infra-reset' to compatible.

v2 changes:
https://patchwork.kernel.org/patch/11697371/
1. add 'assert-deassert-together' property to introduce a new reset handler,
which allows device to do serialized assert and deassert operations in a single
step by 'reset' method.
2. add 'update-force' property to introduce force-update method, which forces
the write operation in case the read already happens to return the correct value.
3. add 'generic-reset' to compatible

v1 changes:
https://patchwork.kernel.org/patch/11690523/
https://patchwork.kernel.org/patch/11690527/

Crystal Guo (3):
  dt-binding: reset-controller: mediatek: add YAML schemas
  reset-controller: ti: introduce a new reset handler
  reset-controller: ti: force the write operation when assert or
    deassert

 .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++
 drivers/reset/reset-ti-syscon.c               | 44 ++++++++++++++--
 2 files changed, 92 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml