Message ID | 20210111111914.22211-1-yong.wu@mediatek.com (mailing list archive) |
---|---|
Headers | show |
Series | MT8192 IOMMU support | expand |
On Mon, Jan 11, 2021 at 07:18:41PM +0800, Yong Wu wrote: > This patch mainly adds support for mt8192 Multimedia IOMMU and SMI. > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation > table format. The M4U-SMI HW diagram is as below: > > EMI > | > M4U > | > ------------ > SMI Common > ------------ > | > +-------+------+------+----------------------+-------+ > | | | | ...... | | > | | | | | | > larb0 larb1 larb2 larb4 ...... larb19 larb20 > disp0 disp1 mdp vdec IPE IPE > > All the connections are HW fixed, SW can NOT adjust it. > > Comparing with the preview SoC, this patchset mainly adds two new functions: > a) add iova 34 bits support. > b) add multi domains support since several HW has the special iova > region requirement. This is looking good and I'd really like to see it merged, especially as it has changes to the io-pgtable code. Please could you post a new version ASAP to address the comments on patches 6 and 7? Will
Hi Yong, On Mon, Jan 11, 2021 at 07:18:41PM +0800, Yong Wu wrote: > This patch mainly adds support for mt8192 Multimedia IOMMU and SMI. > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation > table format. The M4U-SMI HW diagram is as below: > > EMI > | > M4U > | > ------------ > SMI Common > ------------ > | > +-------+------+------+----------------------+-------+ > | | | | ...... | | > | | | | | | > larb0 larb1 larb2 larb4 ...... larb19 larb20 > disp0 disp1 mdp vdec IPE IPE > > All the connections are HW fixed, SW can NOT adjust it. > > Comparing with the preview SoC, this patchset mainly adds two new functions: > a) add iova 34 bits support. > b) add multi domains support since several HW has the special iova > region requirement. > > change note: > v6:a) base on v5.11-rc1. and tlb v4: > https://lore.kernel.org/linux-mediatek/20210107122909.16317-1-yong.wu@mediatek.com/T/#t > b) Remove the "domain id" definition in the binding header file. > Get the domain from dev->dma_range_map. > After this, Change many codes flow. > c) the patchset adds a new common file(mtk_smi-larb-port.h). > This version changes that name into mtk-memory-port.h which reflect > its file path. This only changes the file name. no other change. > thus I keep all the Reviewed-by Tags. > (another reason is that we will add some iommu ports unrelated with > smi-larb) > d) Refactor the power-domain flow suggestted by Tomasz. > e) Some other small fix. use different oas for different soc; Change the > macro for 34bit iova tlb flush. > Thanks for the fixes. I still think the concept of dma-ranges is not quire right for the problem we need to solve here, but it certainly works for the time being and it's possible to remove it in a follow up patch, so I'm fine with merging this as is. Reviewed-by: Tomasz Figa <tfiga@chromium.org> I'll comment on my suggestion for a replacement for the dma-ranges that doesn't need hardcoding arbitrary address ranges in DT in a separate reply. Best regards, Tomasz
On Mon, Jan 11, 2021 at 07:18:41PM +0800, Yong Wu wrote: > This patch mainly adds support for mt8192 Multimedia IOMMU and SMI. > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation > table format. The M4U-SMI HW diagram is as below: > > EMI > | > M4U > | > ------------ > SMI Common > ------------ > | > +-------+------+------+----------------------+-------+ > | | | | ...... | | > | | | | | | > larb0 larb1 larb2 larb4 ...... larb19 larb20 > disp0 disp1 mdp vdec IPE IPE > > All the connections are HW fixed, SW can NOT adjust it. > > Comparing with the preview SoC, this patchset mainly adds two new functions: > a) add iova 34 bits support. > b) add multi domains support since several HW has the special iova > region requirement. > > change note: > v6:a) base on v5.11-rc1. and tlb v4: > https://lore.kernel.org/linux-mediatek/20210107122909.16317-1-yong.wu@mediatek.com/T/#t I've queued this up apart from patches 6 and 7. Thanks, Will
On Mon, 2021-02-01 at 14:54 +0000, Will Deacon wrote: > On Mon, Jan 11, 2021 at 07:18:41PM +0800, Yong Wu wrote: > > This patch mainly adds support for mt8192 Multimedia IOMMU and SMI. > > > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation > > table format. The M4U-SMI HW diagram is as below: > > > > EMI > > | > > M4U > > | > > ------------ > > SMI Common > > ------------ > > | > > +-------+------+------+----------------------+-------+ > > | | | | ...... | | > > | | | | | | > > larb0 larb1 larb2 larb4 ...... larb19 larb20 > > disp0 disp1 mdp vdec IPE IPE > > > > All the connections are HW fixed, SW can NOT adjust it. > > > > Comparing with the preview SoC, this patchset mainly adds two new functions: > > a) add iova 34 bits support. > > b) add multi domains support since several HW has the special iova > > region requirement. > > > > change note: > > v6:a) base on v5.11-rc1. and tlb v4: > > https://lore.kernel.org/linux-mediatek/20210107122909.16317-1-yong.wu@mediatek.com/T/#t > > I've queued this up apart from patches 6 and 7. Thanks very much for the applying. I'd like to show there is a little conflict with a smi change[1] in /include/soc/mediatek/smi.h. This is the detailed conflict: --- a/include/soc/mediatek/smi.h +++ b/include/soc/mediatek/smi.h @@ -9,7 +9,7 @@ #include <linux/bitops.h> #include <linux/device.h> -#ifdef CONFIG_MTK_SMI +#if IS_ENABLED(CONFIG_MTK_SMI) <---The smi patch change here. #define MTK_LARB_NR_MAX 16 <---This iommu patchset delete this line. This code is simple. Please feel free to tell me how to do this if this is not convenient to merge. [1] https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git/commit/?h=for-next&id=50fc8d9232cdc64b9e9d1b9488452f153de52b69 > > Thanks, > > Will
On Tue, Feb 02, 2021 at 10:03:45AM +0800, Yong Wu wrote: > On Mon, 2021-02-01 at 14:54 +0000, Will Deacon wrote: > > On Mon, Jan 11, 2021 at 07:18:41PM +0800, Yong Wu wrote: > > > This patch mainly adds support for mt8192 Multimedia IOMMU and SMI. > > > > > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation > > > table format. The M4U-SMI HW diagram is as below: > > > > > > EMI > > > | > > > M4U > > > | > > > ------------ > > > SMI Common > > > ------------ > > > | > > > +-------+------+------+----------------------+-------+ > > > | | | | ...... | | > > > | | | | | | > > > larb0 larb1 larb2 larb4 ...... larb19 larb20 > > > disp0 disp1 mdp vdec IPE IPE > > > > > > All the connections are HW fixed, SW can NOT adjust it. > > > > > > Comparing with the preview SoC, this patchset mainly adds two new functions: > > > a) add iova 34 bits support. > > > b) add multi domains support since several HW has the special iova > > > region requirement. > > > > > > change note: > > > v6:a) base on v5.11-rc1. and tlb v4: > > > https://lore.kernel.org/linux-mediatek/20210107122909.16317-1-yong.wu@mediatek.com/T/#t > > > > I've queued this up apart from patches 6 and 7. > > Thanks very much for the applying. I'd like to show there is a little > conflict with a smi change[1] in /include/soc/mediatek/smi.h. > > This is the detailed conflict: > > --- a/include/soc/mediatek/smi.h > +++ b/include/soc/mediatek/smi.h > @@ -9,7 +9,7 @@ > #include <linux/bitops.h> > #include <linux/device.h> > > -#ifdef CONFIG_MTK_SMI > +#if IS_ENABLED(CONFIG_MTK_SMI) <---The smi patch change here. > > #define MTK_LARB_NR_MAX 16 <---This iommu patchset delete this line. > > > This code is simple. Please feel free to tell me how to do this if this > is not convenient to merge. Thanks, but this should be trivial to resolve, so I don't think we need to worry about it. Will