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[RFC,v3,net-next,0/4] MT7530 interrupt support

Message ID 20210408123919.2528516-1-dqfext@gmail.com (mailing list archive)
Headers show
Series MT7530 interrupt support | expand

Message

DENG Qingfang April 8, 2021, 12:39 p.m. UTC
Add support for MT7530 interrupt controller.

DENG Qingfang (4):
  net: phy: add MediaTek PHY driver
  net: dsa: mt7530: add interrupt support
  dt-bindings: net: dsa: add MT7530 interrupt controller binding
  staging: mt7621-dts: enable MT7530 interrupt controller

 .../devicetree/bindings/net/dsa/mt7530.txt    |   5 +
 drivers/net/dsa/Kconfig                       |   1 +
 drivers/net/dsa/mt7530.c                      | 266 ++++++++++++++++--
 drivers/net/dsa/mt7530.h                      |  20 +-
 drivers/net/phy/Kconfig                       |   5 +
 drivers/net/phy/Makefile                      |   1 +
 drivers/net/phy/mediatek.c                    | 112 ++++++++
 drivers/staging/mt7621-dts/mt7621.dtsi        |   3 +
 8 files changed, 384 insertions(+), 29 deletions(-)
 create mode 100644 drivers/net/phy/mediatek.c

Comments

René van Dorst April 8, 2021, 2:02 p.m. UTC | #1
Quoting DENG Qingfang <dqfext@gmail.com>:

> Add support for MT7530 interrupt controller.
>
> DENG Qingfang (4):
>   net: phy: add MediaTek PHY driver
>   net: dsa: mt7530: add interrupt support
>   dt-bindings: net: dsa: add MT7530 interrupt controller binding
>   staging: mt7621-dts: enable MT7530 interrupt controller
>
>  .../devicetree/bindings/net/dsa/mt7530.txt    |   5 +
>  drivers/net/dsa/Kconfig                       |   1 +
>  drivers/net/dsa/mt7530.c                      | 266 ++++++++++++++++--
>  drivers/net/dsa/mt7530.h                      |  20 +-
>  drivers/net/phy/Kconfig                       |   5 +
>  drivers/net/phy/Makefile                      |   1 +
>  drivers/net/phy/mediatek.c                    | 112 ++++++++
>  drivers/staging/mt7621-dts/mt7621.dtsi        |   3 +
>  8 files changed, 384 insertions(+), 29 deletions(-)
>  create mode 100644 drivers/net/phy/mediatek.c
>
> --
> 2.25.1

I already tested v2 which works fine.
v3 works too.

Tested on Ubiquiti ER-X-SFP (MT7621) with 1 external phy which uses irq=POLL.

See dmesg log:

[   12.045645] mt7530 mdio-bus:1f eth0 (uninitialized): PHY  
[mt7530-0:00] driver [MediaTek MT7530 PHY] (irq=24)
[   12.425643] mt7530 mdio-bus:1f eth1 (uninitialized): PHY  
[mt7530-0:01] driver [MediaTek MT7530 PHY] (irq=25)
[   12.745642] mt7530 mdio-bus:1f eth2 (uninitialized): PHY  
[mt7530-0:02] driver [MediaTek MT7530 PHY] (irq=26)
[   13.065656] mt7530 mdio-bus:1f eth3 (uninitialized): PHY  
[mt7530-0:03] driver [MediaTek MT7530 PHY] (irq=27)
[   13.445657] mt7530 mdio-bus:1f eth4 (uninitialized): PHY  
[mt7530-0:04] driver [MediaTek MT7530 PHY] (irq=28)
[   13.785656] mt7530 mdio-bus:1f eth5 (uninitialized): PHY  
[mdio-bus:07] driver [Qualcomm Atheros AR8031/AR8033] (irq=POLL)

Tested-by: René van Dorst <opensource@vdorst.com>

Greats,

René
DENG Qingfang April 8, 2021, 3 p.m. UTC | #2
Hi René,

On Thu, Apr 8, 2021 at 10:02 PM René van Dorst <opensource@vdorst.com> wrote:
>
> Tested on Ubiquiti ER-X-SFP (MT7621) with 1 external phy which uses irq=POLL.
>

I wonder if the external PHY's IRQ can be registered in the devicetree.
Change MT7530_NUM_PHYS to 6, and add the following to ER-X-SFP dts PHY node:

interrupt-parent = <&switch0>;
interrupts = <5>;
Andrew Lunn April 8, 2021, 4:47 p.m. UTC | #3
On Thu, Apr 08, 2021 at 11:00:08PM +0800, DENG Qingfang wrote:
> Hi René,
> 
> On Thu, Apr 8, 2021 at 10:02 PM René van Dorst <opensource@vdorst.com> wrote:
> >
> > Tested on Ubiquiti ER-X-SFP (MT7621) with 1 external phy which uses irq=POLL.
> >
> 
> I wonder if the external PHY's IRQ can be registered in the devicetree.
> Change MT7530_NUM_PHYS to 6, and add the following to ER-X-SFP dts PHY node:

I don't know this platform. What is the PHYs interrupt pin connected
to? A SoC GPIO? There is a generic mechanism to describe PHY
interrupts in DT. That should be used, if it is a GPIO.

	   Andrew
René van Dorst April 9, 2021, 12:25 p.m. UTC | #4
Quoting Andrew Lunn <andrew@lunn.ch>:

> On Thu, Apr 08, 2021 at 11:00:08PM +0800, DENG Qingfang wrote:
>> Hi René,
>>
>> On Thu, Apr 8, 2021 at 10:02 PM René van Dorst  
>> <opensource@vdorst.com> wrote:
>> >
>> > Tested on Ubiquiti ER-X-SFP (MT7621) with 1 external phy which  
>> uses irq=POLL.
>> >
>>
>> I wonder if the external PHY's IRQ can be registered in the devicetree.
>> Change MT7530_NUM_PHYS to 6, and add the following to ER-X-SFP dts PHY node:
>
> I don't know this platform. What is the PHYs interrupt pin connected
> to? A SoC GPIO? There is a generic mechanism to describe PHY
> interrupts in DT. That should be used, if it is a GPIO.
>
> 	   Andrew

Quoting Andrew Lunn <andrew@lunn.ch>:

> On Thu, Apr 08, 2021 at 11:00:08PM +0800, DENG Qingfang wrote:
>> Hi René,
>>
>> On Thu, Apr 8, 2021 at 10:02 PM René van Dorst  
>> <opensource@vdorst.com> wrote:
>> >
>> > Tested on Ubiquiti ER-X-SFP (MT7621) with 1 external phy which  
>> uses irq=POLL.
>> >
>>
>> I wonder if the external PHY's IRQ can be registered in the devicetree.
>> Change MT7530_NUM_PHYS to 6, and add the following to ER-X-SFP dts PHY node:
>
> I don't know this platform. What is the PHYs interrupt pin connected
> to? A SoC GPIO? There is a generic mechanism to describe PHY
> interrupts in DT. That should be used, if it is a GPIO.
>
> 	   Andrew


Hi Andrew,

I couldn't find if the external phy IRQ is connected to any gpio of the SOC.
So External PHY IRQ can't be sensed via a gpio.


The patch used the MT7530 link change interrupt and flags.
Maybe the patch is misusing the these flags as an interrupt?
The same MT7530 register also has the interrupt flags for the internal phys.
But in the MT7531 datasheet they don't describe them.

On the other hand I don't have any information about the internal PHY  
or register settings.
So enabling the interrupt on the PHY is currently not possible.

I also forced enabled all the MT7530 PHY interrupts and PHY link  
change interrupts.
I print the interrupt status mt7530.
I don't see any MT7530 interrupt fired when link changing the port  
5/external phy.
Which was of course as expected. We only have 5 internal phy's for the  
port 0 to 4.
Port 5 and 6 is only have a MAC that is connected to the SOC of an  
external PHY.

Greats,

René