From patchwork Mon Nov 29 18:44:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 12645469 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AACDC433EF for ; Mon, 29 Nov 2021 18:47:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=RFM0yA42UT1iDfA33pqwGtUu1KXG606ngeq3gDHhJeo=; b=daZEpyaLTnXckQ sNfiUpErv4lActCE/ZBlIovlNLgdkB8BZ3YyCS/b1qfvKQshwCaVrCxRlDj6OvmU8sK2Zywph/AsU 42kbVLF6v+fWTriFC+4BLWC1o//WheoZss4KtXm7ilUgs9vc8fHtlNf4M0EHAm7YXmum/qFNnmlWJ jHEvGbRWT+0uKUae0TG0PyztmYaSY/6IT6BwN2hFYZAZ9g83yRNRJD5d+NswSQLHTE8vBiHtvaVG7 6jwmE69HtEVa6H/wGoiPzm56NXieZqEmxgMGuH/+2XDf7KEYkKiSILhkONsePcWrHPFc9qim6xRQc tb4IoI9xObPHw0Sv9pFg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mrlgk-001sFj-SM; Mon, 29 Nov 2021 18:47:42 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mrle3-001quA-0z; Mon, 29 Nov 2021 18:44:57 +0000 X-UUID: 9b3f7c74ab9b45e38dd53b444acb91d0-20211129 X-UUID: 9b3f7c74ab9b45e38dd53b444acb91d0-20211129 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2031786344; Mon, 29 Nov 2021 11:44:44 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 29 Nov 2021 10:44:42 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Tue, 30 Nov 2021 02:44:41 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 30 Nov 2021 02:44:41 +0800 From: jason-jh.lin To: Rob Herring , Matthias Brugger , Chun-Kuang Hu , "Philipp Zabel" , AngeloGioacchino Del Regno CC: Enric Balletbo i Serra , Maxime Coquelin , David Airlie , Daniel Vetter , Alexandre Torgue , , , , , , Fabien Parent , Yongqiang Niu , , , , , , , Subject: [PATCH v13 00/15] Add Mediatek Soc DRM (vdosys0) support for mt8195 Date: Tue, 30 Nov 2021 02:44:24 +0800 Message-ID: <20211129184439.16892-1-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211129_104455_123096_01896E1C X-CRM114-Status: GOOD ( 19.68 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Change in v13: - remove dts patch - rebase on kernel-5.16-rc1 - rebase on mediatek-drm-next Change in v12: - add clock-names property to merge yaml - using BIT(nr) macro to define the settings of mmsys routing table - fix clk_get and clk_prepare_enable error handling issue Change in v11: - rebase on kernel-5.15-rc1 - change mbox label to gce0 for dts node of vdosys0 - change ovl compatibale to mt8192 to set smi_id_en=true in driver data - move common module from display folder to common folder, such as AAL, COCLOR, CCORR and MUTEX Change in v10: - rebase on "drm/mediatek: add support for mediatek SOC MT8192" series https://patchwork.kernel.org/project/linux-mediatek/list/?series=529489 - rebase on "soc: mediatek: mmsys: add mt8192 mmsys support" series https://patchwork.kernel.org/project/linux-mediatek/list/?series=524857 - fix some typo and "mediatek" start with capital in every dt-bindings - move mutex yaml from dfisplay folder to soc folder - separate merge additional propoerties to an individual dt-bindings patch Change in v9: - separate power and gce properties of mmsys into another dt-binding patch - rebase on "Separate aal module" series https://patchwork.kernel.org/project/linux-mediatek/list/?series=516463 - keep mtk_ddp_clk_enable/disable in the same place - change mtk_dsc_start config register to mtk_drm_ddp_write_mask - remove the 0 setting of merge fifo config function - add CCORR driver data for mt8195 Change in v8: - add DP_INTF0 mux into mmsys routing table - add DP_INTF0 mutex mod and enum into add/remove comp function - remove bypass DSC enum in mtk_ddp_comp_init Change in v7: - add dt=binding of mmsys and disp path into this series - separate th modidfication of alphabetic order, remove unused define and rename the define of register offset to individual patch - add comment for MERGE ultra and preultra setting Change in v6: - adjust alphabetic order for mediatek-drm - move the patch that add mt8195 support for mediatek-drm as the lastest patch - add MERGE define for const varriable Change in v5: - add power-domain property into vdosys0 and vdosys1 dts node. - add MT8195 prifix and remove unused VDO1 define in mt8195-mmsys.h Change in v4: - extract dt-binding patches to another patch series https://patchwork.kernel.org/project/linux-mediatek/list/?series=519597 - squash DSC module into mtk_drm_ddp_comp.c - add coment and simplify MERGE config function Change in v3: - change mmsys and display dt-bindings document from txt to yaml - add MERGE additional description in display dt-bindings document - fix mboxes-cells number of vdosys0 node in dts - drop mutex eof convert define - remove pm_runtime apis in DSC and MERGE - change DSC and MERGE enum to alphabetic order Change in v2: - add DSC yaml file - add mt8195 drm driver porting parts in to one patch - remove useless define, variable, structure member and function - simplify DSC and MERGE file and switch threre order jason-jh.lin (15): dt-bindings: arm: mediatek: mmsys: add power and gce properties dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding dt-bindings: display: mediatek: disp: split each block to individual yaml dt-bindings: display: mediatek: dsc: add yaml for mt8195 SoC binding dt-bindings: display: mediatek: merge: add additional prop for mt8195 dt-bindings: display: mediatek: add mt8195 SoC binding for vdosys0 dt-bindings: arm: mediatek: move common module from display folder soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 soc: mediatek: add mtk-mutex support for mt8195 vdosys0 drm/mediatek: remove unused define in mtk_drm_ddp_comp.c drm/mediatek: rename the define of register offset drm/mediatek: adjust to the alphabetic order for mediatek-drm drm/mediatek: add DSC support for mediatek-drm drm/mediatek: add MERGE support for mediatek-drm drm/mediatek: add mediatek-drm of vdosys0 support for mt8195 .../bindings/arm/mediatek/mediatek,aal.yaml | 79 ++++++ .../bindings/arm/mediatek/mediatek,ccorr.yaml | 78 ++++++ .../bindings/arm/mediatek/mediatek,color.yaml | 88 +++++++ .../bindings/arm/mediatek/mediatek,mmsys.yaml | 32 ++- .../bindings/arm/mediatek/mediatek,mutex.yaml | 81 ++++++ .../bindings/arm/mediatek/mediatek,wdma.yaml | 88 +++++++ .../display/mediatek/mediatek,disp.txt | 219 ---------------- .../display/mediatek/mediatek,dither.yaml | 79 ++++++ .../display/mediatek/mediatek,dsc.yaml | 71 +++++ .../display/mediatek/mediatek,gamma.yaml | 80 ++++++ .../display/mediatek/mediatek,merge.yaml | 109 ++++++++ .../display/mediatek/mediatek,od.yaml | 53 ++++ .../display/mediatek/mediatek,ovl-2l.yaml | 91 +++++++ .../display/mediatek/mediatek,ovl.yaml | 106 ++++++++ .../display/mediatek/mediatek,postmask.yaml | 72 +++++ .../display/mediatek/mediatek,rdma.yaml | 120 +++++++++ .../display/mediatek/mediatek,split.yaml | 58 +++++ .../display/mediatek/mediatek,ufoe.yaml | 61 +++++ drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_disp_drv.h | 8 + drivers/gpu/drm/mediatek/mtk_disp_merge.c | 246 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 208 +++++++++------ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 26 +- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 152 ++++++----- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + drivers/soc/mediatek/mt8195-mmsys.h | 220 ++++++++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 11 + drivers/soc/mediatek/mtk-mutex.c | 95 ++++++- include/linux/soc/mediatek/mtk-mmsys.h | 9 + 30 files changed, 2174 insertions(+), 374 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,aal.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ccorr.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,color.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mutex.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,wdma.yaml delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_merge.c create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h