| Message ID | 20230602090227.7264-1-yong.wu@mediatek.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | MT8188 IOMMU SUPPORT | expand |
On Fri, Jun 2, 2023 at 5:03 PM Yong Wu <yong.wu@mediatek.com> wrote: > > MT8188 have 3 IOMMU HWs. 2 IOMMU HW is for multimedia, and 1 IOMMU HW > is for infra-master, like PCIe. > > About the 2 MM IOMMU HW, the connection could be something like this: > > IOMMU(VDO) IOMMU(VPP) > | | > SMI_COMMON(VDO) SMI_COMMON(VPP) > --------------- ---------------- > | | ... | | ... > larb0 larb2 ... larb1 larb3 ... > > INFRA IOMMU does not have SMI, the master connects to IOMMU directly. > > Although multiple banks supported in MT8188, we only use one of them, > which means PCIe is put in bank0 of INFRA IOMMU. > > So we have two pgtable for MT8188, specifically, these two MM IOMMU HW > share a pgtable while INFRA IOMMU HW use a independent pgtable. > > Another change is that we add some SMC command for INFRA master to > enable INFRA IOMMU in ATF considering security concerns. > > We also adjust the flow of mtk_iommu_config to reduce indention. A friendly ping - this series was reviewed, but I'm not sure if it's still on the radar today. This can be cleanly applied on top of next-20230725. To give more confidence, I also tested the basic multimedia and infra functionalities on my MT8188 with this series, so Tested-by: Fei Shao <fshao@chromium.org> to the entire v12 series. Regards, Fei
On Tue, Aug 01, 2023 at 12:53:29PM +0000, Yong Wu (吴勇) wrote:
> Your A-b always is expected before Joerg applies.
It is time to make some progress on the MTK driver patch flow. I just
applied this series, thanks.
MT8188 have 3 IOMMU HWs. 2 IOMMU HW is for multimedia, and 1 IOMMU HW is for infra-master, like PCIe. About the 2 MM IOMMU HW, the connection could be something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON(VDO) SMI_COMMON(VPP) --------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... INFRA IOMMU does not have SMI, the master connects to IOMMU directly. Although multiple banks supported in MT8188, we only use one of them, which means PCIe is put in bank0 of INFRA IOMMU. So we have two pgtable for MT8188, specifically, these two MM IOMMU HW share a pgtable while INFRA IOMMU HW use a independent pgtable. Another change is that we add some SMC command for INFRA master to enable INFRA IOMMU in ATF considering security concerns. We also adjust the flow of mtk_iommu_config to reduce indention. Change in v12: - Change nothing. Just rebase on v6.4-rc4 and collect AngeloGioacchino's R-b. change in v11: https://lore.kernel.org/linux-iommu/20230418083514.4379-1-yong.wu@mediatek.com/ - Just add a new entry in MAINTAINERS from AngeloGioacchino. change in v10: https://lore.kernel.org/linux-mediatek/20230417073606.25729-1-yong.wu@mediatek.com/ - Add a Fixes tag for [2/7]. - Rebase on mtk-iommu-dma-range-v7: https://lore.kernel.org/linux-mediatek/20230411093144.2690-1-yong.wu@mediatek.com/ change since v9: https://lore.kernel.org/linux-mediatek/20230317085541.20447-1-yong.wu@mediatek.com/ - Move the patch about setting set_dma_mask out from this patchset. - Add a MAINTAINER patch since the header file was added a prefix "mediatek," change since v8: https://lore.kernel.org/linux-mediatek/20230307080555.14399-1-yong.wu@mediatek.com/ - Base on v6.3-rc1 and mtk-iommu-dma-range-v5: https://lore.kernel.org/linux-mediatek/20230307023507.13306-1-yong.wu@mediatek.com/ - Add a new patch set_dma_mask about since mt8188 support the PA of pgtable 35bits. changes since v7: https://lore.kernel.org/linux-mediatek/20230216053322.11596-1-yong.wu@mediatek.com/ - Base on mtk-iommu-dma-range-v4: https://lore.kernel.org/linux-mediatek/20230215062544.8677-1-yong.wu@mediatek.com/ - Add a new patch for two IOMMU share pagetable issue. - Add a new patch for adding iova_region_larb_msk for mt8188. - Add the comment in the dt-binding header file about larb index. This is for readable when updating the iova_region_larb_msk. Since there is something wrong for chengci's mail account when sending to devicetree mail list, we don't know why. I help send this patchset. https://lore.kernel.org/linux-mediatek/5a916595-12ee-92e6-d380-84146dd75218@linaro.org/ changes since v6: https://lore.kernel.org/linux-mediatek/20221223101439.494-1-chengci.xu@mediatek.com/ - base on tag: next-20221220. - update commit message of patch[2/4]. changes since v5: - base on tag: next-20221205. - add flag PGTABLE_PA_35_EN for all IOMMU in MT8188. - modify the type of "portid_msk" from "u32" to "unsigned long". changes since v4: - base on tag: next-20221018. - add patch[2/4] to reduce indention by adjust mtk_iommu_config flow. changes since v3: - base on tag: next-20220916. - use license "GPL-2.0-only OR BSD-2-Clause" in bingings head file. - drop redundant "portid" assignment when configure infra master. - reduce indentation by using "else if" when config infra master. - update probe flow about "pericfg" for CFG_IFA_MASTER_IN_ATF. - drop unused "pericfg_comp_str" in mt8188_data_infra. - drop words like "This commit/patch". changes since v2: - base on tag: next-20220831. - rename "mt8188-memory-port.h" to "mediatek,mt8188-memory-port.h". - use dual-license in "mediatek,mt8188-memory-port.h" - remove unnecessary "()" when define SMI_LARB_ID changes since v1: - base on tag: next-20220803. - adds MT8188 IOMMU support. Chengci.Xu (5): dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMU iommu/mediatek: Fix two IOMMU share pagetable issue iommu/mediatek: Adjust mtk_iommu_config flow iommu/mediatek: Add enable IOMMU SMC command for INFRA masters iommu/mediatek: Add MT8188 IOMMU Support Yong Wu (2): iommu/mediatek: mt8188: Add iova_region_larb_msk MAINTAINERS: iommu/mediatek: Update the header file name .../bindings/iommu/mediatek,iommu.yaml | 12 +- MAINTAINERS | 1 + drivers/iommu/mtk_iommu.c | 151 ++++-- .../memory/mediatek,mt8188-memory-port.h | 489 ++++++++++++++++++ include/soc/mediatek/smi.h | 1 + 5 files changed, 622 insertions(+), 32 deletions(-) create mode 100644 include/dt-bindings/memory/mediatek,mt8188-memory-port.h