[v4,0/2] Add SMI LARBs reset for MediaTek MT8188 SoC

Message

Friday Yang Feb. 21, 2025, 7:50 a.m. UTC

Based on tag: next-20250220, linux-next/master

On the MediaTek MT8188 SoC platform, we encountered power-off failures
and SMI bus hang issues during camera stress tests. The issue arises
because bus glitches are sometimes produced when MTCMOS powers on or
off. While this is fairly normal, the software must handle these
glitches to avoid mistaking them for transaction signals. What's
more, this issue emerged only after the initial upstreaming of this
binding.

The software solutions can be summarized as follows:

1. Use CLAMP to disable the SMI sub-common port after turning off the
   LARB CG and before turning off the LARB MTCMOS.
2. Use CLAMP to disable/enable the SMI sub-common port.
3. Implement an AXI reset for SMI LARBs.

This patch primarily provides the implementation of an AXI reset.

Changes v4:
- Modify the commit message

v3:
https://lore.kernel.org/lkml/20250121065045.13514-2
[e-mail]/
https://lore.kernel.org/lkml/20250121065045.13514-3
[e-mail]/

Friday Yang (2):
  dt-bindings: clock: mediatek: Add SMI LARBs reset for MT8188
  clk: mediatek: Add SMI LARBs reset for MT8188

 .../bindings/clock/mediatek,mt8188-clock.yaml | 21 +++++++++++++++++++
 drivers/clk/mediatek/clk-mt8188-cam.c         | 17 +++++++++++++++
 drivers/clk/mediatek/clk-mt8188-img.c         | 18 ++++++++++++++++
 drivers/clk/mediatek/clk-mt8188-ipe.c         | 14 +++++++++++++
 4 files changed, 70 insertions(+)

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2.46.0