From patchwork Mon Jul 13 09:32:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yingjoe Chen X-Patchwork-Id: 6777041 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8FA47C05AD for ; Mon, 13 Jul 2015 09:34:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B739220553 for ; Mon, 13 Jul 2015 09:34:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ED8CE205B6 for ; Mon, 13 Jul 2015 09:34:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZEa7h-00025O-KY; Mon, 13 Jul 2015 09:34:05 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZEa7M-0001If-11; Mon, 13 Jul 2015 09:33:44 +0000 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1720125314; Mon, 13 Jul 2015 17:33:39 +0800 Received: from mtksdtcf02.mediatek.inc (10.21.12.142) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Mon, 13 Jul 2015 17:33:38 +0800 From: Yingjoe Chen To: Matthias Brugger , Thomas Gleixner , Stephen Boyd , Michael Turquette , James Liao Subject: [PATCH 4/5] clk: mediatek: add 13mhz clock for MT8173 Date: Mon, 13 Jul 2015 17:32:48 +0800 Message-ID: <1436779969-18610-5-git-send-email-yingjoe.chen@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1436779969-18610-1-git-send-email-yingjoe.chen@mediatek.com> References: <1436779969-18610-1-git-send-email-yingjoe.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150713_023344_304684_7CCB18A1 X-CRM114-Status: GOOD ( 15.22 ) X-Spam-Score: -1.1 (-) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Russell King , srv_heupstream@mediatek.com, Arnd Bergmann , Catalin Marinas , Daniel Lezcano , linux-kernel@vger.kernel.org, Rob Herring , linux-mediatek@lists.infradead.org, Sascha Hauer , Olof Johansson , Yingjoe Chen , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add 13mhz clock used by GPT timer in infracfg. Signed-off-by: Yingjoe Chen Acked-by: Stephen Boyd --- drivers/clk/mediatek/clk-mt8173.c | 5 +++++ include/dt-bindings/clock/mt8173-clk.h | 3 ++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c index 4b9e04c..540c5c3 100644 --- a/drivers/clk/mediatek/clk-mt8173.c +++ b/drivers/clk/mediatek/clk-mt8173.c @@ -618,6 +618,10 @@ static const struct mtk_gate infra_clks[] __initconst = { GATE_ICG(CLK_INFRA_PMICWRAP, "infra_pmicwrap", "axi_sel", 23), }; +static const struct mtk_fixed_factor infra_divs[] __initconst = { + FACTOR(CLK_INFRA_CLK_13M, "clk13m", "clk26m", 1, 2), +}; + static const struct mtk_gate_regs peri0_cg_regs = { .set_ofs = 0x0008, .clr_ofs = 0x0010, @@ -737,6 +741,7 @@ static void __init mtk_infrasys_init(struct device_node *node) mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), clk_data); + mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data); r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); if (r) diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h index 4ad76ed..fa2a2bb 100644 --- a/include/dt-bindings/clock/mt8173-clk.h +++ b/include/dt-bindings/clock/mt8173-clk.h @@ -187,7 +187,8 @@ #define CLK_INFRA_CEC 9 #define CLK_INFRA_PMICSPI 10 #define CLK_INFRA_PMICWRAP 11 -#define CLK_INFRA_NR_CLK 12 +#define CLK_INFRA_CLK_13M 12 +#define CLK_INFRA_NR_CLK 13 /* PERI_SYS */