| Message ID | 1436851111-2369-5-git-send-email-yingjoe.chen@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 07/14/2015 12:18 AM, Yingjoe Chen wrote: > Add arch timer node to enable arch-timer support. MT8135 firmware > doesn't correctly setup arch-timer frequency and CNTVOFF, add > properties to workaround this. [...] > > + timer { > + compatible = "arm,armv7-timer"; > + interrupt-parent = <&gic>; > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | > + IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | > + IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | > + IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | > + IRQ_TYPE_LEVEL_LOW)>; > + clock-frequency = <13000000>; > + arm,cpu-registers-not-fw-configured; It's disappointing to see this property in new DTS submissions. It prevents taking advantage of the VDSO for gettimeofday/clock_gettime.
On Tue, 2015-07-14 at 09:19 -0500, Nathan Lynch wrote: > On 07/14/2015 12:18 AM, Yingjoe Chen wrote: > > Add arch timer node to enable arch-timer support. MT8135 firmware > > doesn't correctly setup arch-timer frequency and CNTVOFF, add > > properties to workaround this. > > [...] > > > > > + timer { > > + compatible = "arm,armv7-timer"; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | > > + IRQ_TYPE_LEVEL_LOW)>, > > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | > > + IRQ_TYPE_LEVEL_LOW)>, > > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | > > + IRQ_TYPE_LEVEL_LOW)>, > > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | > > + IRQ_TYPE_LEVEL_LOW)>; > > + clock-frequency = <13000000>; > > + arm,cpu-registers-not-fw-configured; > > It's disappointing to see this property in new DTS submissions. It > prevents taking advantage of the VDSO for gettimeofday/clock_gettime. > Hi, I know. But unfortunately this is a more then 1 year SoC, so I can't do anything to change this :( Joe.C
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index 0aba9eb..0264d2e 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -44,6 +44,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "mediatek,mt81xx-tz-smp"; cpu0: cpu@0 { device_type = "cpu"; @@ -96,6 +97,21 @@ }; + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | + IRQ_TYPE_LEVEL_LOW)>; + clock-frequency = <13000000>; + arm,cpu-registers-not-fw-configured; + }; + soc { #address-cells = <2>; #size-cells = <2>;
Add arch timer node to enable arch-timer support. MT8135 firmware doesn't correctly setup arch-timer frequency and CNTVOFF, add properties to workaround this. This also set cpu enable-method to enable SMP. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> --- arch/arm/boot/dts/mt8135.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)