From patchwork Wed Oct 7 12:22:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dawei Chien X-Patchwork-Id: 7344791 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DEEBD9F302 for ; Wed, 7 Oct 2015 12:23:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0912A2072B for ; Wed, 7 Oct 2015 12:23:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9B6C920741 for ; Wed, 7 Oct 2015 12:23:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zjnkb-0001YH-5V; Wed, 07 Oct 2015 12:23:17 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZjnkY-0001RO-Nr; Wed, 07 Oct 2015 12:23:15 +0000 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1796595318; Wed, 07 Oct 2015 20:22:45 +0800 Received: from mtkslt303.mediatek.inc (10.21.14.116) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Wed, 7 Oct 2015 20:22:44 +0800 From: Dawei Chien To: Viresh Kumar Subject: [PATCH v2 1/2] thermal: mediatek: Add cpu power cooling model. Date: Wed, 7 Oct 2015 20:22:40 +0800 Message-ID: <1444220561-26139-2-git-send-email-dawei.chien@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1444220561-26139-1-git-send-email-dawei.chien@mediatek.com> References: <1444220561-26139-1-git-send-email-dawei.chien@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151007_052315_059091_CB67DD40 X-CRM114-Status: GOOD ( 21.67 ) X-Spam-Score: -1.1 (-) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Pawel Moll , Ian Campbell , Dawei Chien , Sascha Hauer , Daniel Lezcano , "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, Rob Herring , linux-pm@vger.kernel.org, Sascha Hauer , Kumar Gala , Matthias Brugger , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Dawei.Chien" This power model is base on Intelligent Power Allocation (IPA) technical, requires that the operating-points of the CPUs are registered using the kernel's opp library and the `cpufreq_frequency_table` is assigned to the `struct device` of the cpu MT8173. Signed-off-by: Dawei.Chien --- This patch is base on https://patchwork.kernel.org/patch/7034601/ --- drivers/cpufreq/mt8173-cpufreq.c | 97 +++++++++++++++++++++++++++++++++----- 1 file changed, 86 insertions(+), 11 deletions(-) diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c index 49caed2..9233ec5 100644 --- a/drivers/cpufreq/mt8173-cpufreq.c +++ b/drivers/cpufreq/mt8173-cpufreq.c @@ -28,7 +28,8 @@ #define MAX_VOLT_SHIFT (200000) #define MAX_VOLT_LIMIT (1150000) #define VOLT_TOL (10000) - +#define CAPACITANCE_CA53 (263) +#define CAPACITANCE_CA57 (530) /* * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in @@ -51,6 +52,72 @@ struct mtk_cpu_dvfs_info { bool need_voltage_tracking; }; +struct mtk_cpu_static_power { + unsigned long voltage; + unsigned int power; +}; + +/* measured by WA program. */ +static const struct mtk_cpu_static_power mtk_ca53_static_power[] = { + {859000, 43}, + {908000, 52}, + {983000, 86}, + {1009000, 123}, + {1028000, 138}, + {1083000, 172}, + {1109000, 180}, + {1125000, 192}, +}; + +/* measured by WA program. */ +static const struct mtk_cpu_static_power mtk_ca57_static_power[] = { + {828000, 72}, + {867000, 90}, + {927000, 156}, + {968000, 181}, + {1007000, 298}, + {1049000, 435}, + {1089000, 533}, + {1125000, 533}, +}; + +unsigned int mtk_cpufreq_lookup_power(const struct mtk_cpu_static_power *table, + unsigned int count, unsigned long voltage) +{ + int i; + + for (i = 0; i < count; i++) { + if (voltage <= table[i].voltage) + return table[i].power; + } + + return table[count - 1].power; +} + +int mtk_cpufreq_get_static(cpumask_t *cpumask, int interval, + unsigned long voltage, u32 *power) +{ + int nr_cpus = cpumask_weight(cpumask); + + *power = 0; + + if (nr_cpus) { + + if (cpumask_test_cpu(0, cpumask)) + *power += mtk_cpufreq_lookup_power( + mtk_ca53_static_power, + ARRAY_SIZE(mtk_ca53_static_power), + voltage); + + if (cpumask_test_cpu(2, cpumask)) + *power += mtk_cpufreq_lookup_power( + mtk_ca57_static_power, + ARRAY_SIZE(mtk_ca57_static_power), + voltage); + } + return 0; +} + static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info, int new_vproc) { @@ -272,15 +339,21 @@ static void mtk_cpufreq_ready(struct cpufreq_policy *policy) return; if (of_find_property(np, "#cooling-cells", NULL)) { - info->cdev = of_cpufreq_cooling_register(np, - policy->related_cpus); - - if (IS_ERR(info->cdev)) { - dev_err(info->cpu_dev, - "running cpufreq without cooling device: %ld\n", - PTR_ERR(info->cdev)); - - info->cdev = NULL; + u32 capacitance = cpumask_test_cpu(0, policy->related_cpus) ? + CAPACITANCE_CA53 : CAPACITANCE_CA57; + + if (!info->cdev) { + info->cdev = of_cpufreq_power_cooling_register(np, + policy->related_cpus, + capacitance, + mtk_cpufreq_get_static); + + if (IS_ERR(info->cdev)) { + dev_err(info->cpu_dev, + "running cpufreq without cooling device: %ld\n", + PTR_ERR(info->cdev)); + info->cdev = NULL; + } } } @@ -460,7 +533,9 @@ static int mtk_cpufreq_exit(struct cpufreq_policy *policy) { struct mtk_cpu_dvfs_info *info = policy->driver_data; - cpufreq_cooling_unregister(info->cdev); + if (info->cdev) + cpufreq_cooling_unregister(info->cdev); + dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table); mtk_cpu_dvfs_info_release(info); kfree(info);