From patchwork Fri Oct 16 20:12:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Zabel X-Patchwork-Id: 7420531 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D4DAA9F302 for ; Fri, 16 Oct 2015 20:13:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4C6ED208E1 for ; Fri, 16 Oct 2015 20:13:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4E614208AC for ; Fri, 16 Oct 2015 20:13:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZnBNC-0002Fy-0Z; Fri, 16 Oct 2015 20:13:06 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZnBN7-00020f-ES for linux-mediatek@lists.infradead.org; Fri, 16 Oct 2015 20:13:04 +0000 Received: from dude.hi.4.pengutronix.de ([10.1.0.7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1ZnBMU-0005f8-5z; Fri, 16 Oct 2015 22:12:22 +0200 From: Philipp Zabel To: dri-devel@lists.freedesktop.org Subject: [RFC v4 07/11] drm/mediatek: enable hdmi output control bit Date: Fri, 16 Oct 2015 22:12:09 +0200 Message-Id: <1445026333-17013-8-git-send-email-p.zabel@pengutronix.de> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1445026333-17013-1-git-send-email-p.zabel@pengutronix.de> References: <1445026333-17013-1-git-send-email-p.zabel@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.7 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-mediatek@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151016_131301_764901_00367034 X-CRM114-Status: GOOD ( 10.26 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Paul Bolle , YT Shen , Jitao Shi , Jie Qiu , Pawel Moll , Ian Campbell , Cawa Cheng , Daniel Stone , CK Hu , Rob Herring , linux-mediatek@lists.infradead.org, Daniel Vetter , Kumar Gala , Matthias Brugger , Philipp Zabel , Dave Airlie , kernel@pengutronix.de MIME-Version: 1.0 Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jie Qiu MT8173 HDMI hardware has a output control bit to enable/disable HDMI output. Because of security reason, so this bit can ONLY be controlled in ARM supervisor mode. Now the only way to enter ARM supervisor is the ARM trusted firmware. So atf provides a API for HDMI driver to call to setup this HDMI control bit to enable HDMI output in supervisor mode. Signed-off-by: Jie Qiu Signed-off-by: Philipp Zabel --- drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 11 +++++++++++ drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c b/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c index 2e898fd..5093a7f 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c @@ -19,8 +19,15 @@ #include #include #include +#include #include +static int (*invoke_psci_fn)(u64, u64, u64, u64); +typedef int (*psci_initcall_t)(const struct device_node *); + +asmlinkage int __invoke_psci_fn_hvc(u64, u64, u64, u64); +asmlinkage int __invoke_psci_fn_smc(u64, u64, u64, u64); + static u32 mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset) { return readl(hdmi->regs + offset); @@ -173,6 +180,10 @@ void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable) { + invoke_psci_fn = __invoke_psci_fn_smc; + invoke_psci_fn(MTK_SIP_SET_AUTHORIZED_SECURE_REG, + 0x14000904, 0x80000000, 0); + regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20, HDMI_PCLK_FREE_RUN, enable ? HDMI_PCLK_FREE_RUN : 0); regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C, diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h index b3d75e2..87cea50 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h @@ -317,4 +317,5 @@ #define RGS_HDMITX_5T1_EDG (0xf << 4) #define RGS_HDMITX_PLUG_TST BIT(0) +#define MTK_SIP_SET_AUTHORIZED_SECURE_REG 0x82000001 #endif