From patchwork Wed Feb 17 11:28:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Zabel X-Patchwork-Id: 8337001 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 040B99F399 for ; Wed, 17 Feb 2016 11:30:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 14E1D20382 for ; Wed, 17 Feb 2016 11:30:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B39DA203B6 for ; Wed, 17 Feb 2016 11:30:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aW0JE-0004sX-7i; Wed, 17 Feb 2016 11:30:16 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aW0J0-0003rn-GR for linux-mediatek@lists.infradead.org; Wed, 17 Feb 2016 11:30:05 +0000 Received: from paszta.hi.4.pengutronix.de ([10.1.0.120] helo=paszta.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1aW0IH-0000s2-72; Wed, 17 Feb 2016 12:29:17 +0100 From: Philipp Zabel To: dri-devel@lists.freedesktop.org Subject: [PATCH v11 10/14] clk: mediatek: make dpi0_sel propagate rate changes Date: Wed, 17 Feb 2016 12:28:50 +0100 Message-Id: <1455708534-20274-11-git-send-email-p.zabel@pengutronix.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1455708534-20274-1-git-send-email-p.zabel@pengutronix.de> References: <1455708534-20274-1-git-send-email-p.zabel@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.120 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-mediatek@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160217_033002_928950_3152379F X-CRM114-Status: GOOD ( 11.54 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Stephen Boyd , Michael Turquette , Dave Airlie , Jie Qiu , Cawa Cheng , Daniel Stone , YT Shen , Yingjoe Chen , Philipp Zabel , devicetree@vger.kernel.org, Jitao Shi , kernel@pengutronix.de, Pawel Moll , Ian Campbell , CK Hu , Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Paul Bolle , Emil Velikov , Tomasz Figa , Daniel Vetter , Kumar Gala MIME-Version: 1.0 Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This mux is supposed to select a fitting divider after the PLL is already set to the correct rate. Signed-off-by: Philipp Zabel Acked-by: James Liao --- Changes since v10: - Add comments about MUX_GATE rate change propagation --- drivers/clk/mediatek/clk-mt8173.c | 6 +++++- drivers/clk/mediatek/clk-mtk.h | 15 +++++++++++++-- 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c index 227e356..85c0bfc 100644 --- a/drivers/clk/mediatek/clk-mt8173.c +++ b/drivers/clk/mediatek/clk-mt8173.c @@ -558,7 +558,11 @@ static const struct mtk_composite top_muxes[] __initconst = { MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x0090, 16, 2, 23), MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents, 0x0090, 24, 4, 31), /* CLK_CFG_6 */ - MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0, 3, 7), + /* + * The dpi0_sel clock should not propagate rate changes to its parent + * clock so the dpi driver can have full control over PLL and divider. + */ + MUX_GATE_FLAGS(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0, 3, 7, 0), MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x00a0, 8, 2, 15), MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16, 3, 23), MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel", aud_1_parents, 0x00a0, 24, 2, 31), diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index 32d2e45..9f24fcf 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -83,7 +83,11 @@ struct mtk_composite { signed char num_parents; }; -#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) { \ +/* + * In case the rate change propagation to parent clocks is undesirable, + * this macro allows to specify the clock flags manually. + */ +#define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate, _flags) { \ .id = _id, \ .name = _name, \ .mux_reg = _reg, \ @@ -94,9 +98,16 @@ struct mtk_composite { .divider_shift = -1, \ .parent_names = _parents, \ .num_parents = ARRAY_SIZE(_parents), \ - .flags = CLK_SET_RATE_PARENT, \ + .flags = _flags, \ } +/* + * Unless necessary, all MUX_GATE clocks propagate rate changes to their + * parent clock by default. + */ +#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ + MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate, CLK_SET_RATE_PARENT) + #define MUX(_id, _name, _parents, _reg, _shift, _width) { \ .id = _id, \ .name = _name, \