From patchwork Thu Feb 18 15:50:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Valentin X-Patchwork-Id: 8351641 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 22BB8C0553 for ; Thu, 18 Feb 2016 15:50:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1930F2034A for ; Thu, 18 Feb 2016 15:50:56 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 102A220274 for ; Thu, 18 Feb 2016 15:50:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aWQr0-0006PA-3c; Thu, 18 Feb 2016 15:50:54 +0000 Received: from mail-pa0-x22a.google.com ([2607:f8b0:400e:c03::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aWQqx-0006K8-Sc; Thu, 18 Feb 2016 15:50:53 +0000 Received: by mail-pa0-x22a.google.com with SMTP id fy10so32889354pac.1; Thu, 18 Feb 2016 07:50:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+RjMXhwRpx+muRmCIfxechqEeqn+Ry+3F2y9lz83ag4=; b=NCUpCkirbCZWA1d1OzG8c3N0SWBaQ+MnwB04hgaYj5Cl8JtQpPB9bNfh1FnAXSuKGe vWSYKH3NZ27VUCvlMZOiJF8mQs8G36XmF7MSnE4vBO7jNiJ4ymPZq9/r3wmm+GvQhoNQ Xu7Zvhb0MCI44ojR/G/JmwW5Wwzm3fj+JQ1f4SL8/WEmQ/cI5h1H7Bb6nfjl50tZRXoQ JYHP4fRo926SABVK9HQjePg3P4NtJMHmQA0D5aYkiiiz5nESOCHEgBSIktShob8vyDD7 Cp3EYr7LeCaZhMe1quK8CFNJyzjPOxtq/UqIjocax2LE+vyma7+ixlHERVA86c5gopLb oA8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+RjMXhwRpx+muRmCIfxechqEeqn+Ry+3F2y9lz83ag4=; b=Bv+Udvpw4cX2MCWo9w76KzATg579SeC3H4HpZWK3vJXCyXWC9q6qOVzyKmoWwIahVr pA6kjmyMSKTe8YMQjFf5hfcRfRDFNJ3V1KNb1jYyndtUkhb1CDG8U0mOfOmO9tv1aDfw R0EYSBok3VrLvpLwBAz7GhcuYuJGYbmJZFcLpazzU8DykJ8VkFnZrCbkWZz31UIKBwue V4yrzegY9thQsWm5P5S9GgXl9VU68wD5Gza7YlbQw0adURGmePSt+CZSEtmyuVCJN6cO e7CTMEyb31hToCW/c553XGGhVcZvg5tbB+D0D7S3BzpEiDGMsJ900KTMCvqzX015Qwt2 GHBA== X-Gm-Message-State: AG10YOT4KYVIDgTm8TNAmbryBprgfAff/1gwBPXf1H1of8dHkeDOBu2ht1xhhg0W14gk/w== X-Received: by 10.66.190.168 with SMTP id gr8mr11034369pac.23.1455810630966; Thu, 18 Feb 2016 07:50:30 -0800 (PST) Received: from localhost ([2601:647:4203:c8e0:7256:81ff:febd:926d]) by smtp.gmail.com with ESMTPSA id p9sm11298231pfa.11.2016.02.18.07.50.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Feb 2016 07:50:29 -0800 (PST) From: Eduardo Valentin To: s.hauer@pengutronix.de Subject: [PATCH 1/1] thermal: small style cleanup in mtk_thermal Date: Thu, 18 Feb 2016 07:50:25 -0800 Message-Id: <1455810625-20509-1-git-send-email-edubezval@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1448883753-19068-1-git-send-email-s.hauer@pengutronix.de> References: <1448883753-19068-1-git-send-email-s.hauer@pengutronix.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160218_075052_009403_11DDE960 X-CRM114-Status: GOOD ( 16.81 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Eduardo Valentin , linux-mediatek@lists.infradead.org, kernel@pengutronix.de, matthias.bgg@gmail.com, rui.zhang@intel.com, eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Remove all checkpatch.pl --strict errors, checks, and warnings. Cc: Zhang Rui Cc: Matthias Brugger Cc: linux-pm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Eduardo Valentin Reviewed-by: Matthias Brugger --- Sascha, Add your v12 in my forlinus branch. But also, on top of it I cleaned the patch further with the following patch. BR, Eduardo drivers/thermal/mtk_thermal.c | 56 ++++++++++++++++++++++--------------------- 1 file changed, 29 insertions(+), 27 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 589a138..3d93b1c 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -78,7 +78,7 @@ #define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff) -#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16 +#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff) << 16) #define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff) #define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x) @@ -108,15 +108,15 @@ #define MT8173_NUM_SENSORS_PER_ZONE 4 /* Layout of the fuses providing the calibration data */ -#define MT8173_CALIB_BUF0_VALID (1 << 0) -#define MT8173_CALIB_BUF1_ADC_GE(x) (((x) >> 22 ) & 0x3ff) -#define MT8173_CALIB_BUF0_VTS_TS1(x) (((x) >> 17 ) & 0x1ff) -#define MT8173_CALIB_BUF0_VTS_TS2(x) (((x) >> 8 ) & 0x1ff) -#define MT8173_CALIB_BUF1_VTS_TS3(x) (((x) >> 0 ) & 0x1ff) -#define MT8173_CALIB_BUF2_VTS_TS4(x) (((x) >> 23 ) & 0x1ff) -#define MT8173_CALIB_BUF2_VTS_TSABB(x) (((x) >> 14 ) & 0x1ff) -#define MT8173_CALIB_BUF0_DEGC_CALI(x) (((x) >> 1 ) & 0x3f) -#define MT8173_CALIB_BUF0_O_SLOPE(x) (((x) >> 26 ) & 0x3f) +#define MT8173_CALIB_BUF0_VALID BIT(0) +#define MT8173_CALIB_BUF1_ADC_GE(x) (((x) >> 22) & 0x3ff) +#define MT8173_CALIB_BUF0_VTS_TS1(x) (((x) >> 17) & 0x1ff) +#define MT8173_CALIB_BUF0_VTS_TS2(x) (((x) >> 8) & 0x1ff) +#define MT8173_CALIB_BUF1_VTS_TS3(x) (((x) >> 0) & 0x1ff) +#define MT8173_CALIB_BUF2_VTS_TS4(x) (((x) >> 23) & 0x1ff) +#define MT8173_CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff) +#define MT8173_CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f) +#define MT8173_CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f) #define THERMAL_NAME "mtk-thermal" @@ -136,6 +136,7 @@ struct mtk_thermal { struct mtk_thermal_bank banks[MT8173_NUM_ZONES]; + /* lock: for getting and putting banks */ struct mutex lock; /* Calibration values */ @@ -271,11 +272,9 @@ static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank) static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) { struct mtk_thermal *mt = bank->mt; - int temp, i, max; + int i, temp = INT_MIN, max = INT_MIN; u32 raw; - temp = max = INT_MIN; - for (i = 0; i < bank_data[bank->id].num_sensors; i++) { raw = readl(mt->thermal_base + sensing_points[i].msr); @@ -322,7 +321,7 @@ static const struct thermal_zone_of_device_ops mtk_thermal_ops = { }; static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, - u32 apmixed_phys_base, u32 auxadc_phys_base) + u32 apmixed_phys_base, u32 auxadc_phys_base) { struct mtk_thermal_bank *bank = &mt->banks[num]; const struct mtk_thermal_bank_cfg *cfg = &bank_data[num]; @@ -346,7 +345,7 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, /* poll is set to 10u */ writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768), - mt->thermal_base + TEMP_AHBPOLL); + mt->thermal_base + TEMP_AHBPOLL); /* temperature sampling control, 1 sample */ writel(0x0, mt->thermal_base + TEMP_MSRCTL0); @@ -375,49 +374,50 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, /* AHB address for auxadc mux selection */ writel(auxadc_phys_base + AUXADC_CON1_CLR_V, - mt->thermal_base + TEMP_ADCMUXADDR); + mt->thermal_base + TEMP_ADCMUXADDR); /* AHB address for pnp sensor mux selection */ writel(apmixed_phys_base + APMIXED_SYS_TS_CON1, - mt->thermal_base + TEMP_PNPMUXADDR); + mt->thermal_base + TEMP_PNPMUXADDR); /* AHB value for auxadc enable */ writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCEN); /* AHB address for auxadc enable (channel 0 immediate mode selected) */ writel(auxadc_phys_base + AUXADC_CON1_SET_V, - mt->thermal_base + TEMP_ADCENADDR); + mt->thermal_base + TEMP_ADCENADDR); /* AHB address for auxadc valid bit */ writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL), - mt->thermal_base + TEMP_ADCVALIDADDR); + mt->thermal_base + TEMP_ADCVALIDADDR); /* AHB address for auxadc voltage output */ writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL), - mt->thermal_base + TEMP_ADCVOLTADDR); + mt->thermal_base + TEMP_ADCVOLTADDR); /* read valid & voltage are at the same register */ writel(0x0, mt->thermal_base + TEMP_RDCTRL); /* indicate where the valid bit is */ writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12), - mt->thermal_base + TEMP_ADCVALIDMASK); + mt->thermal_base + TEMP_ADCVALIDMASK); /* no shift */ writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT); /* enable auxadc mux write transaction */ writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE, - mt->thermal_base + TEMP_ADCWRITECTRL); + mt->thermal_base + TEMP_ADCWRITECTRL); for (i = 0; i < cfg->num_sensors; i++) writel(sensor_mux_values[cfg->sensors[i]], - mt->thermal_base + sensing_points[i].adcpnp); + mt->thermal_base + sensing_points[i].adcpnp); writel((1 << cfg->num_sensors) - 1, mt->thermal_base + TEMP_MONCTL0); - writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE | TEMP_ADCWRITECTRL_ADC_MUX_WRITE, - mt->thermal_base + TEMP_ADCWRITECTRL); + writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE | + TEMP_ADCWRITECTRL_ADC_MUX_WRITE, + mt->thermal_base + TEMP_ADCWRITECTRL); mtk_thermal_put_bank(bank); } @@ -434,7 +434,8 @@ static u64 of_get_phys_base(struct device_node *np) return of_translate_address(np, regaddr_p); } -static int mtk_thermal_get_calibration_data(struct device *dev, struct mtk_thermal *mt) +static int mtk_thermal_get_calibration_data(struct device *dev, + struct mtk_thermal *mt) { struct nvmem_cell *cell; u32 *buf; @@ -567,7 +568,8 @@ static int mtk_thermal_probe(struct platform_device *pdev) } for (i = 0; i < MT8173_NUM_ZONES; i++) - mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base); + mtk_thermal_init_bank(mt, i, apmixed_phys_base, + auxadc_phys_base); platform_set_drvdata(pdev, mt);