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dt-binding: correct the larb port offset defines for mt2701

Message ID 1470902828-32496-1-git-send-email-honghui.zhang@mediatek.com (mailing list archive)
State New, archived
Headers show

Commit Message

Honghui Zhang Aug. 11, 2016, 8:07 a.m. UTC
From: Honghui Zhang <honghui.zhang@mediatek.com>

larb2 have 23 ports, the LARB3_PORT_OFFSET should be LARB2_PORT_OFFSET
plus larb2's port number, it should be 44 instead of 43.

Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
---
 include/dt-bindings/memory/mt2701-larb-port.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Joerg Roedel Aug. 22, 2016, 10:47 a.m. UTC | #1
On Thu, Aug 11, 2016 at 04:07:08PM +0800, honghui.zhang@mediatek.com wrote:
> From: Honghui Zhang <honghui.zhang@mediatek.com>
> 
> larb2 have 23 ports, the LARB3_PORT_OFFSET should be LARB2_PORT_OFFSET
> plus larb2's port number, it should be 44 instead of 43.
> 
> Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
> ---
>  include/dt-bindings/memory/mt2701-larb-port.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks.
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Patch

diff --git a/include/dt-bindings/memory/mt2701-larb-port.h b/include/dt-bindings/memory/mt2701-larb-port.h
index 78f6678..6764d74 100644
--- a/include/dt-bindings/memory/mt2701-larb-port.h
+++ b/include/dt-bindings/memory/mt2701-larb-port.h
@@ -26,7 +26,7 @@ 
 #define LARB0_PORT_OFFSET		0
 #define LARB1_PORT_OFFSET		11
 #define LARB2_PORT_OFFSET		21
-#define LARB3_PORT_OFFSET		43
+#define LARB3_PORT_OFFSET		44
 
 #define MT2701_M4U_ID_LARB0(port)	((port) + LARB0_PORT_OFFSET)
 #define MT2701_M4U_ID_LARB1(port)	((port) + LARB1_PORT_OFFSET)