| Message ID | 1484296978-18572-4-git-send-email-erin.lo@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 13/01/17 09:42, Erin Lo wrote: > From: Xiaolei Li <xiaolei.li@mediatek.com> > > Add mt2701 nand device node, include nfi and bch ecc. > > Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> > Signed-off-by: Erin Lo <erin.lo@mediatek.com> > --- > arch/arm/boot/dts/mt2701.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > Applied to v4.10-next/dts32 > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi > index 87be52c..1182c43 100644 > --- a/arch/arm/boot/dts/mt2701.dtsi > +++ b/arch/arm/boot/dts/mt2701.dtsi > @@ -261,6 +261,28 @@ > status = "disabled"; > }; > > + nandc: nfi@1100d000 { > + compatible = "mediatek,mt2701-nfc"; > + reg = <0 0x1100d000 0 0x1000>; > + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>; > + clocks = <&pericfg CLK_PERI_NFI>, > + <&pericfg CLK_PERI_NFI_PAD>; > + clock-names = "nfi_clk", "pad_clk"; > + status = "disabled"; > + ecc-engine = <&bch>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + bch: ecc@1100e000 { > + compatible = "mediatek,mt2701-ecc"; > + reg = <0 0x1100e000 0 0x1000>; > + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>; > + clocks = <&pericfg CLK_PERI_NFI_ECC>; > + clock-names = "nfiecc_clk"; > + status = "disabled"; > + }; > + > spi1: spi@11016000 { > compatible = "mediatek,mt2701-spi"; > #address-cells = <1>; >
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 87be52c..1182c43 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -261,6 +261,28 @@ status = "disabled"; }; + nandc: nfi@1100d000 { + compatible = "mediatek,mt2701-nfc"; + reg = <0 0x1100d000 0 0x1000>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_NFI>, + <&pericfg CLK_PERI_NFI_PAD>; + clock-names = "nfi_clk", "pad_clk"; + status = "disabled"; + ecc-engine = <&bch>; + #address-cells = <1>; + #size-cells = <0>; + }; + + bch: ecc@1100e000 { + compatible = "mediatek,mt2701-ecc"; + reg = <0 0x1100e000 0 0x1000>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_NFI_ECC>; + clock-names = "nfiecc_clk"; + status = "disabled"; + }; + spi1: spi@11016000 { compatible = "mediatek,mt2701-spi"; #address-cells = <1>;