From patchwork Fri May 5 15:26:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 9713819 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2A2F160362 for ; Fri, 5 May 2017 15:28:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 12FDF28652 for ; Fri, 5 May 2017 15:28:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 076C028686; Fri, 5 May 2017 15:28:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B0AD628652 for ; Fri, 5 May 2017 15:28:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xBWAwLd0oCZOmpl+dHWkNWHvNrkuNlYYNXhV0fjlGGI=; b=FHOY8QQ9/TQMxu fSIJieAuINPjEtniL16GPIwQ5a+SDAOBOgVcq0susoEp1QzGBre8lbbfxKWuaC3oor0rdagtjuAwG +Gs1unebLB9AniZJlFZ+GAxIv7KOS/cW7ncVh8VXISVT+fW//Iu7KC7ZCLwUw+FKP338s43wisMLH DyEbhZe4SJAFija9VgJ3pKMvbz5hTMUI/djTtzuI6UEuEw2w0uxWec+j8ujpRdlojFtkKZQ8Od688 nvlSw4a20paw/aL5hPjA3GWtbi3Bxy/NjpDDwDBo2R1C8AdzteghE6voPrg99cVanucmttCkVBfA8 T80Ccmkc1lt33Mydq8YQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1d6fA0-0003bs-IJ; Fri, 05 May 2017 15:28:48 +0000 Received: from merlin.infradead.org ([2001:4978:20e::2]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1d6f8R-0001Wl-PS; Fri, 05 May 2017 15:27:11 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=LISHnwfhllfXbrqWKY2WwBFabQ63dZV3Aw1Kx5RbQqo=; b=ERDeKGS+zc2L4+I873nGL/LWO RLSWP1w2aTvHZ+vLbb05tTrFEGWI9FoMumyC5Duxzf7JG/WorbdlzF0eMpGhfIOmXKeslX00yA1Un S2DzgQOwdyZx26BwxFC1Q6F1INFAMgvXO8/texpuDQXd4c5qJgdcWwp3Pdy2QRZhWfUozXIWmjhVa ec+oX2OaEqAVU9DhDmMN4PHyAKuLyerWvQxg1tZ0FwNZRFnsEm3VefluHCVdkOOMVPFbyIsJGjKn/ VgoBIeG5KcijhvOCiUVUMBvuBs3ii17j14/7YzERC4sZt33zx3wzGikP4azAOKPkI2fRYmpHxgFGI wpZfEnHPQ==; Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by merlin.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1d6f8M-0007WZ-71; Fri, 05 May 2017 15:27:08 +0000 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 509650533; Fri, 05 May 2017 23:26:28 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Fri, 5 May 2017 23:26:26 +0800 From: To: , , , , , , , , , , , , , , , Subject: [PATCH 3/6] clk: mediatek: export cpu multiplexer clock for MT8173 SoCs Date: Fri, 5 May 2017 23:26:11 +0800 Message-ID: <1493997974-17699-4-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1493997974-17699-1-git-send-email-sean.wang@mediatek.com> References: <1493997974-17699-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170505_112706_504103_F4A222C4 X-CRM114-Status: GOOD ( 15.04 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sean Wang , Pi-Cheng Chen , linux-kernel@vger.kernel.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sean Wang The patch enables CPU multiplexer clock on MT8173 SoC which fixes up cpufreq driver fails at acquiring intermediate clock source when driver probe is called. Signed-off-by: Pi-Cheng Chen Signed-off-by: Sean Wang --- drivers/clk/mediatek/clk-mt8173.c | 23 +++++++++++++++++++++++ include/dt-bindings/clock/mt8173-clk.h | 4 +++- 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c index 0ac3aee..96c292c 100644 --- a/drivers/clk/mediatek/clk-mt8173.c +++ b/drivers/clk/mediatek/clk-mt8173.c @@ -18,6 +18,7 @@ #include "clk-mtk.h" #include "clk-gate.h" +#include "clk-cpumux.h" #include @@ -525,6 +526,25 @@ static const char * const i2s3_b_ck_parents[] __initconst = { "apll2_div5" }; +static const char * const ca53_parents[] __initconst = { + "clk26m", + "armca7pll", + "mainpll", + "univpll" +}; + +static const char * const ca57_parents[] __initconst = { + "clk26m", + "armca15pll", + "mainpll", + "univpll" +}; + +static const struct mtk_composite cpu_muxes[] __initconst = { + MUX(CLK_INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2), + MUX(CLK_INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2), +}; + static const struct mtk_composite top_muxes[] __initconst = { /* CLK_CFG_0 */ MUX(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3), @@ -948,6 +968,9 @@ static void __init mtk_infrasys_init(struct device_node *node) clk_data); mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data); + mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes), + clk_data); + r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); if (r) pr_err("%s(): could not register clock provider: %d\n", diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h index 6094bf7..8aea623 100644 --- a/include/dt-bindings/clock/mt8173-clk.h +++ b/include/dt-bindings/clock/mt8173-clk.h @@ -193,7 +193,9 @@ #define CLK_INFRA_PMICSPI 10 #define CLK_INFRA_PMICWRAP 11 #define CLK_INFRA_CLK_13M 12 -#define CLK_INFRA_NR_CLK 13 +#define CLK_INFRA_CA53SEL 13 +#define CLK_INFRA_CA57SEL 14 +#define CLK_INFRA_NR_CLK 15 /* PERI_SYS */