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Thu, 25 May 2017 04:43:00 +0000 Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dDkVl-0006Yo-Ao; Thu, 25 May 2017 04:36:35 +0000 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1374027054; Thu, 25 May 2017 12:36:07 +0800 Received: from mtkslt306.mediatek.inc (10.21.14.136) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Thu, 25 May 2017 12:36:05 +0800 From: Ryder Lee To: Kishon Vijay Abraham I , Rob Herring Subject: [PATCH v3 2/2] dt-bindings: phy: Add documentation for Mediatek PCIe PHY Date: Thu, 25 May 2017 12:36:03 +0800 Message-ID: <1495686963-50071-3-git-send-email-ryder.lee@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1495686963-50071-1-git-send-email-ryder.lee@mediatek.com> References: <1495686963-50071-1-git-send-email-ryder.lee@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170524_213633_550637_1225E45B X-CRM114-Status: GOOD ( 14.51 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Ryder Lee , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add dt-binding information for Mediatek PCIe PHY Signed-off-by: Ryder Lee Acked-by: Rob Herring --- .../devicetree/bindings/phy/phy-mediatek-pcie.txt | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-mediatek-pcie.txt diff --git a/Documentation/devicetree/bindings/phy/phy-mediatek-pcie.txt b/Documentation/devicetree/bindings/phy/phy-mediatek-pcie.txt new file mode 100644 index 0000000..a9cf0dd --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-mediatek-pcie.txt @@ -0,0 +1,64 @@ +Mediatek PCIe PHY +----------------------- + +Required properties: + - compatible: should be one of + "mediatek,mt7623-pcie-phy" + "mediatek,mt2701-pcie-phy" + - reg: Base address and length of the registers. + - clocks: Must contain an entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must be "pciephya_ref" + - #phy-cells: Must be 0. + +Optional properties: + - mediatek,phy-switch: A phandle to the system controller, used to + enable the PCIe PHY function if needed. + +Example: + + pcie0_phy: pcie-phy@1a149000 { + compatible = "mediatek,mt7623-pcie-phy"; + reg = <0 0x1a149000 0 0x1000>; + clocks = <&clk26m>; + clock-names = "pciephya_ref"; + #phy-cells = <0>; + }; + + pcie1_phy: pcie-phy@1a14a000 { + compatible = "mediatek,mt7623-pcie-phy"; + reg = <0 0x1a14a000 0 0x1000>; + clocks = <&clk26m>; + clock-names = "pciephya_ref"; + #phy-cells = <0>; + }; + + pcie2_phy: pcie-phy@1a244000 { + compatible = "mediatek,mt7623-pcie-phy"; + reg = <0 0x1a244000 0 0x1000>; + clocks = <&clk26m>; + clock-names = "pciephya_ref"; + #phy-cells = <0>; + + mediatek,phy-switch = <&hifsys>; + }; + +Specifying phy control of devices +--------------------------------- + +Device nodes should specify the configuration required in their "phys" +property, containing a phandle to the phy node and phy-names. + +Example: + +#include + +pcie: pcie@1a140000 { + ... + pcie@0,0 { + ... + phys = <&pcie0_phy>; + phy-names = "pcie-phy0"; + } + ... +};