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[188.192.206.66]) by smtp.gmail.com with ESMTPSA id s12sm51547104wrc.89.2017.11.15.07.24.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 Nov 2017 07:24:34 -0800 (PST) From: Ulrich Hecht To: linux-mediatek@lists.infradead.org Subject: [POC 06/16] drm/img-rogue: dma_ops->sync_single_for_*() -> dma_sync_single_for_*() Date: Wed, 15 Nov 2017 16:24:13 +0100 Message-Id: <1510759463-30201-7-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510759463-30201-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1510759463-30201-1-git-send-email-ulrich.hecht+renesas@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171115_072453_917375_433EF94B X-CRM114-Status: UNSURE ( 7.05 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ulrich Hecht , mbrugger@suse.com, magnus.damm@gmail.com, laurent.pinchart@ideasonboard.com, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Ulrich Hecht --- drivers/gpu/drm/img-rogue/1.6/osfunc_arm64.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/img-rogue/1.6/osfunc_arm64.c b/drivers/gpu/drm/img-rogue/1.6/osfunc_arm64.c index 84ae224..091806d 100644 --- a/drivers/gpu/drm/img-rogue/1.6/osfunc_arm64.c +++ b/drivers/gpu/drm/img-rogue/1.6/osfunc_arm64.c @@ -89,8 +89,8 @@ void OSFlushCPUCacheRangeKM(void *pvVirtStart, IMG_CPU_PHYADDR sCPUPhysStart, IMG_CPU_PHYADDR sCPUPhysEnd) { - dma_ops->sync_single_for_device(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_TO_DEVICE); - dma_ops->sync_single_for_cpu(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_FROM_DEVICE); + dma_sync_single_for_device(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_TO_DEVICE); + dma_sync_single_for_cpu(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_FROM_DEVICE); } void OSCleanCPUCacheRangeKM(void *pvVirtStart, @@ -98,7 +98,7 @@ void OSCleanCPUCacheRangeKM(void *pvVirtStart, IMG_CPU_PHYADDR sCPUPhysStart, IMG_CPU_PHYADDR sCPUPhysEnd) { - dma_ops->sync_single_for_device(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_TO_DEVICE); + dma_sync_single_for_device(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_TO_DEVICE); } void OSInvalidateCPUCacheRangeKM(void *pvVirtStart, @@ -106,7 +106,7 @@ void OSInvalidateCPUCacheRangeKM(void *pvVirtStart, IMG_CPU_PHYADDR sCPUPhysStart, IMG_CPU_PHYADDR sCPUPhysEnd) { - dma_ops->sync_single_for_cpu(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_FROM_DEVICE); + dma_sync_single_for_cpu(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_FROM_DEVICE); } void OSUserModeAccessToPerfCountersEn(void)