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[4/4] arm64: dts: mediatek: add pwrap device node for mt8183

Message ID 1537341961-20736-5-git-send-email-hsin-hsiung.wang@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Add PMIC wrapper support for Mediatek MT8183 SoC IC | expand

Commit Message

Hsin-Hsiung Wang Sept. 19, 2018, 7:26 a.m. UTC
add pwrap device node for mt8183.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Matthias Brugger Sept. 29, 2018, 1:30 p.m. UTC | #1
On 19/09/2018 09:26, Hsin-Hsiung Wang wrote:
> add pwrap device node for mt8183.
> 
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)

The basic support for mt8183 is not ready to be merged.
I'll also try to not forget about this patch.
If you re-submit after basic mt8183 support got accepted, that will help me. :)

Thanks,
Matthias

> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index c22a2dc..fa67d781 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -170,6 +170,16 @@
>  		#clock-cells = <1>;
>  	};
>  
> +	pwrap: pwrap@1000d000 {
> +		compatible = "mediatek,mt8183-pwrap";
> +		reg = <0 0x1000d000 0 0x1000>;
> +		reg-names = "pwrap";
> +		interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&topckgen CLK_TOP_MUX_PMICSPI>,
> +			 <&infracfg CLK_INFRA_PMIC_AP>;
> +		clock-names = "spi", "wrap";
> +	};
> +
>  	uart0: serial@11002000 {
>  		compatible = "mediatek,mt8183-uart",
>  			     "mediatek,mt6577-uart";
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index c22a2dc..fa67d781 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -170,6 +170,16 @@ 
 		#clock-cells = <1>;
 	};
 
+	pwrap: pwrap@1000d000 {
+		compatible = "mediatek,mt8183-pwrap";
+		reg = <0 0x1000d000 0 0x1000>;
+		reg-names = "pwrap";
+		interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&topckgen CLK_TOP_MUX_PMICSPI>,
+			 <&infracfg CLK_INFRA_PMIC_AP>;
+		clock-names = "spi", "wrap";
+	};
+
 	uart0: serial@11002000 {
 		compatible = "mediatek,mt8183-uart",
 			     "mediatek,mt6577-uart";