diff mbox series

[v5,27/32] drm/mediatek: add connection from RDMA1 to DSI0

Message ID 1567090254-15566-28-git-send-email-yongqiang.niu@mediatek.com (mailing list archive)
State New, archived
Headers show
Series add drm support for MT8183 | expand

Commit Message

Yongqiang Niu Aug. 29, 2019, 2:50 p.m. UTC
From: Yongqiang Niu <yongqiang.niu@mediatek.com>

This patch add connection from RDMA1 to DSI0

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

CK Hu (胡俊光) Aug. 30, 2019, 6:25 a.m. UTC | #1
Hi, Yongqiang:

On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
> 
> This patch add connection from RDMA1 to DSI0

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 03a46ec..aa6173b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -175,6 +175,7 @@ struct mtk_mmsys_reg_data {
>  	u32 rdma0_sout_color0;
>  	u32 rdma1_sout_sel_in;
>  	u32 rdma1_sout_dpi0;
> +	u32 rdma1_sout_dsi0;
>  	u32 dpi0_sel_in;
>  	u32 dpi0_sel_in_rdma1;
>  	u32 dsi0_sel_in;
> @@ -433,6 +434,9 @@ static unsigned int mtk_ddp_sout_sel(const struct mtk_mmsys_reg_data *data,
>  	} else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_COLOR0) {
>  		*addr = data->rdma0_sout_sel_in;
>  		value = data->rdma0_sout_color0;
> +	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI0) {
> +		*addr = data->rdma1_sout_sel_in;
> +		value = data->rdma1_sout_dsi0;
>  	} else {
>  		value = 0;
>  	}
diff mbox series

Patch

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 03a46ec..aa6173b 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -175,6 +175,7 @@  struct mtk_mmsys_reg_data {
 	u32 rdma0_sout_color0;
 	u32 rdma1_sout_sel_in;
 	u32 rdma1_sout_dpi0;
+	u32 rdma1_sout_dsi0;
 	u32 dpi0_sel_in;
 	u32 dpi0_sel_in_rdma1;
 	u32 dsi0_sel_in;
@@ -433,6 +434,9 @@  static unsigned int mtk_ddp_sout_sel(const struct mtk_mmsys_reg_data *data,
 	} else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_COLOR0) {
 		*addr = data->rdma0_sout_sel_in;
 		value = data->rdma0_sout_color0;
+	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI0) {
+		*addr = data->rdma1_sout_sel_in;
+		value = data->rdma1_sout_dsi0;
 	} else {
 		value = 0;
 	}