| Message ID | 1578021148-32413-4-git-send-email-yongqiang.niu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add drm support for MT8183 | expand |
Hi, Yongqiang: On Fri, 2020-01-03 at 11:12 +0800, Yongqiang Niu wrote: > move dsi/dpi select input into mtk_ddp_sel_in > DPI_SEL_IN_BLS is zero, it is same with hardware default setting, > DISP_REG_CONFIG_DPI_SEL no need set when bls connect with > dpi0 I think you have done two things in this patch. One is remove DISP_REG_CONFIG_DPI_SEL setting, and the other is move DISP_REG_CONFIG_DSI_SEL from mtk_ddp_sout_sel() to mtk_ddp_sel_in(). So separate this into two patches. Regards, CK > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index 39700b9..d66ce31 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -376,6 +376,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, > } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) { > *addr = DISP_REG_CONFIG_DSI_SEL; > value = DSI_SEL_IN_BLS; > + } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) { > + *addr = DISP_REG_CONFIG_DSI_SEL; > + value = DSI_SEL_IN_RDMA; > } else { > value = 0; > } > @@ -393,10 +396,6 @@ static void mtk_ddp_sout_sel(struct regmap *config_regs, > } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) { > regmap_write(config_regs, DISP_REG_CONFIG_OUT_SEL, > BLS_TO_DPI_RDMA1_TO_DSI); > - regmap_write(config_regs, DISP_REG_CONFIG_DSI_SEL, > - DSI_SEL_IN_RDMA); > - regmap_write(config_regs, DISP_REG_CONFIG_DPI_SEL, > - DPI_SEL_IN_BLS); > } > } >
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 39700b9..d66ce31 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -376,6 +376,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) { *addr = DISP_REG_CONFIG_DSI_SEL; value = DSI_SEL_IN_BLS; + } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) { + *addr = DISP_REG_CONFIG_DSI_SEL; + value = DSI_SEL_IN_RDMA; } else { value = 0; } @@ -393,10 +396,6 @@ static void mtk_ddp_sout_sel(struct regmap *config_regs, } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) { regmap_write(config_regs, DISP_REG_CONFIG_OUT_SEL, BLS_TO_DPI_RDMA1_TO_DSI); - regmap_write(config_regs, DISP_REG_CONFIG_DSI_SEL, - DSI_SEL_IN_RDMA); - regmap_write(config_regs, DISP_REG_CONFIG_DPI_SEL, - DPI_SEL_IN_BLS); } }
move dsi/dpi select input into mtk_ddp_sel_in DPI_SEL_IN_BLS is zero, it is same with hardware default setting, DISP_REG_CONFIG_DPI_SEL no need set when bls connect with dpi0 Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)