| Message ID | 1596012277-8448-2-git-send-email-weiyi.lu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Mediatek MT8192 clock support | expand |
Hi Weiyu, Thanks for the patch, some comments below. I am not sure what maintainers think but your patches, in general, are really big and I'm wondering if wouldn't be better split by functionalities. Will make your series much longer but easy to review in my opinion. Anyway, I'm going to comment a few files but the comments can be applied to other files. Missatge de Weiyi Lu <weiyi.lu@mediatek.com> del dia dc., 29 de jul. 2020 a les 10:46: > > This patch adds the binding documentation for apmixedsys, audsys, > camsys-raw, camsys, imgsys, imp_iic_wrap, infracfg, ipesys, mdpsys, > mfgcfg, mmsys, msdc, pericfg, scp-adsp, topckgen, vdecsys-soc, > vdecsys and vencsys for Mediatek MT8192. > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > --- > .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,camsys-raw.yaml | 40 ++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,camsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,imgsys.txt | 2 + > .../arm/mediatek/mediatek,imp_iic_wrap.yaml | 43 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 + > .../bindings/arm/mediatek/mediatek,ipesys.txt | 1 + > .../bindings/arm/mediatek/mediatek,mdpsys.yaml | 38 +++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + > .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,msdc.yaml | 39 ++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,pericfg.yaml | 1 + > .../bindings/arm/mediatek/mediatek,scp-adsp.yaml | 38 +++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 + > .../arm/mediatek/mediatek,vdecsys-soc.yaml | 38 +++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,vencsys.txt | 1 + > 18 files changed, 249 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys-soc.yaml > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > index bd7a0fa..6942ad4 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > @@ -17,6 +17,7 @@ Required Properties: > - "mediatek,mt8135-apmixedsys" > - "mediatek,mt8173-apmixedsys" > - "mediatek,mt8183-apmixedsys", "syscon" > + - "mediatek,mt8192-apmixedsys", "syscon" > - "mediatek,mt8516-apmixedsys" > - #clock-cells: Must be 1 > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > index 38309db..fdcb267 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > @@ -12,6 +12,7 @@ Required Properties: > - "mediatek,mt7622-audsys", "syscon" > - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" > - "mediatek,mt8183-audiosys", "syscon" > + - "mediatek,mt8192-audsys", "syscon" > - "mediatek,mt8516-audsys", "syscon" > - #clock-cells: Must be 1 > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml > new file mode 100644 > index 0000000..db6f425 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml > @@ -0,0 +1,40 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,camsys-raw.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek CAMSYS RAW Controller > + > +maintainers: > + - Weiyi Lu <weiyi.lu@mediatek.com> > + > +description: > + The Mediatek camsys raw controller provides various clocks to the system. > + It only provides clocks or also provides configuration registers non-clock related? > +properties: > + compatible: > + items: > + - enum: > + - mediatek,mt8192-camsys_rawa > + - mediatek,mt8192-camsys_rawb > + - mediatek,mt8192-camsys_rawc > + - const: syscon > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > +required: > + - compatible > + - reg > + > +examples: > + - | > + camsys_rawa: camsys_rawa@1a04f000 { I think that this should be "syscon@1a04f000", since node names are supposed to match the class of the device instead of the name of the device. Just because I am curious, can you show me an example of "mediatek,mt8192-camsys_rawb" or "mediatek,mt8192-camsys_rawc"? It's a different address space? > + compatible = "mediatek,mt8192-camsys_rawa", "syscon"; > + reg = <0 0x1a04f000 0 0x1000>; > + #clock-cells = <1>; > + }; [snip]
On Wed, 2020-07-29 at 11:53 +0200, Enric Balletbo Serra wrote: > Hi Weiyu, > > Thanks for the patch, some comments below. I am not sure what > maintainers think but your patches, in general, are really big and I'm > wondering if wouldn't be better split by functionalities. Will make > your series much longer but easy to review in my opinion. Anyway, I'm > going to comment a few files but the comments can be applied to other > files. > Hi Enric, You're right, these are big. I was trying to to add these documents through the clock series at this stage. Do you suggest to send with other functional series instead through the clock series? > Missatge de Weiyi Lu <weiyi.lu@mediatek.com> del dia dc., 29 de jul. > 2020 a les 10:46: > > > > This patch adds the binding documentation for apmixedsys, audsys, > > camsys-raw, camsys, imgsys, imp_iic_wrap, infracfg, ipesys, mdpsys, > > mfgcfg, mmsys, msdc, pericfg, scp-adsp, topckgen, vdecsys-soc, > > vdecsys and vencsys for Mediatek MT8192. > > > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > > --- > > .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + > > .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + > > .../bindings/arm/mediatek/mediatek,camsys-raw.yaml | 40 ++++++++++++++++++++ > > .../bindings/arm/mediatek/mediatek,camsys.txt | 1 + > > .../bindings/arm/mediatek/mediatek,imgsys.txt | 2 + > > .../arm/mediatek/mediatek,imp_iic_wrap.yaml | 43 ++++++++++++++++++++++ > > .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 + > > .../bindings/arm/mediatek/mediatek,ipesys.txt | 1 + > > .../bindings/arm/mediatek/mediatek,mdpsys.yaml | 38 +++++++++++++++++++ > > .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + > > .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + > > .../bindings/arm/mediatek/mediatek,msdc.yaml | 39 ++++++++++++++++++++ > > .../bindings/arm/mediatek/mediatek,pericfg.yaml | 1 + > > .../bindings/arm/mediatek/mediatek,scp-adsp.yaml | 38 +++++++++++++++++++ > > .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 + > > .../arm/mediatek/mediatek,vdecsys-soc.yaml | 38 +++++++++++++++++++ > > .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + > > .../bindings/arm/mediatek/mediatek,vencsys.txt | 1 + > > 18 files changed, 249 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys-soc.yaml > > > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > > index bd7a0fa..6942ad4 100644 > > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > > @@ -17,6 +17,7 @@ Required Properties: > > - "mediatek,mt8135-apmixedsys" > > - "mediatek,mt8173-apmixedsys" > > - "mediatek,mt8183-apmixedsys", "syscon" > > + - "mediatek,mt8192-apmixedsys", "syscon" > > - "mediatek,mt8516-apmixedsys" > > - #clock-cells: Must be 1 > > > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > > index 38309db..fdcb267 100644 > > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > > @@ -12,6 +12,7 @@ Required Properties: > > - "mediatek,mt7622-audsys", "syscon" > > - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" > > - "mediatek,mt8183-audiosys", "syscon" > > + - "mediatek,mt8192-audsys", "syscon" > > - "mediatek,mt8516-audsys", "syscon" > > - #clock-cells: Must be 1 > > > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml > > new file mode 100644 > > index 0000000..db6f425 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml > > @@ -0,0 +1,40 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: https://urldefense.com/v3/__http://devicetree.org/schemas/arm/mediatek/mediatek,camsys-raw.yaml*__;Iw!!CTRNKA9wMg0ARbw!3w84XoXGRAkVX5zxTBA4o5h7EkKiKBuCO5VZDMmx94qoJK357wbTnjT9XN6SRPQc$ > > +$schema: https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!3w84XoXGRAkVX5zxTBA4o5h7EkKiKBuCO5VZDMmx94qoJK357wbTnjT9XGLX7Fq7$ > > + > > +title: MediaTek CAMSYS RAW Controller > > + > > +maintainers: > > + - Weiyi Lu <weiyi.lu@mediatek.com> > > + > > +description: > > + The Mediatek camsys raw controller provides various clocks to the system. > > + > > It only provides clocks or also provides configuration registers > non-clock related? > Thanks for reminding, it also provides other configuration registers. I'll update the description in next version. > > +properties: > > + compatible: > > + items: > > + - enum: > > + - mediatek,mt8192-camsys_rawa > > + - mediatek,mt8192-camsys_rawb > > + - mediatek,mt8192-camsys_rawc > > + - const: syscon > > + > > + reg: > > + maxItems: 1 > > + > > + '#clock-cells': > > + const: 1 > > + > > +required: > > + - compatible > > + - reg > > + > > +examples: > > + - | > > + camsys_rawa: camsys_rawa@1a04f000 { > > I think that this should be "syscon@1a04f000", since node names are > supposed to match the class of the device instead of the name of the > device. > Got it, I'll fix in next version. > Just because I am curious, can you show me an example of > "mediatek,mt8192-camsys_rawb" or "mediatek,mt8192-camsys_rawc"? It's a > different address space? > > > + compatible = "mediatek,mt8192-camsys_rawa", "syscon"; > > + reg = <0 0x1a04f000 0 0x1000>; > > + #clock-cells = <1>; > > + }; > OK, I'll add those in next version. > [snip]
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt index bd7a0fa..6942ad4 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt @@ -17,6 +17,7 @@ Required Properties: - "mediatek,mt8135-apmixedsys" - "mediatek,mt8173-apmixedsys" - "mediatek,mt8183-apmixedsys", "syscon" + - "mediatek,mt8192-apmixedsys", "syscon" - "mediatek,mt8516-apmixedsys" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt index 38309db..fdcb267 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt @@ -12,6 +12,7 @@ Required Properties: - "mediatek,mt7622-audsys", "syscon" - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" - "mediatek,mt8183-audiosys", "syscon" + - "mediatek,mt8192-audsys", "syscon" - "mediatek,mt8516-audsys", "syscon" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml new file mode 100644 index 0000000..db6f425 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,camsys-raw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek CAMSYS RAW Controller + +maintainers: + - Weiyi Lu <weiyi.lu@mediatek.com> + +description: + The Mediatek camsys raw controller provides various clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-camsys_rawa + - mediatek,mt8192-camsys_rawb + - mediatek,mt8192-camsys_rawc + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +examples: + - | + camsys_rawa: camsys_rawa@1a04f000 { + compatible = "mediatek,mt8192-camsys_rawa", "syscon"; + reg = <0 0x1a04f000 0 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt index a0ce820..0082f21 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt @@ -9,6 +9,7 @@ Required Properties: - "mediatek,mt6765-camsys", "syscon" - "mediatek,mt6779-camsys", "syscon" - "mediatek,mt8183-camsys", "syscon" + - "mediatek,mt8192-camsys", "syscon" - #clock-cells: Must be 1 The camsys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt index 1e1f007..b4312d1 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt @@ -14,6 +14,8 @@ Required Properties: - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon" - "mediatek,mt8173-imgsys", "syscon" - "mediatek,mt8183-imgsys", "syscon" + - "mediatek,mt8192-imgsys", "syscon" + - "mediatek,mt8192-imgsys2", "syscon" - #clock-cells: Must be 1 The imgsys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml new file mode 100644 index 0000000..2af6f98 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,imp_iic_wrap.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek IMP I2C Wrapper Controller + +maintainers: + - Weiyi Lu <weiyi.lu@mediatek.com> + +description: + The Mediatek imp i2c wrapper controller provides various clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-imp_iic_wrap_c + - mediatek,mt8192-imp_iic_wrap_e + - mediatek,mt8192-imp_iic_wrap_s + - mediatek,mt8192-imp_iic_wrap_ws + - mediatek,mt8192-imp_iic_wrap_w + - mediatek,mt8192-imp_iic_wrap_n + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +examples: + - | + imp_iic_wrap_c@11007000 { + compatible = "mediatek,mt8192-imp_iic_wrap_c", "syscon"; + reg = <0 0x11007000 0 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt index 49a968b..ba5e781 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt @@ -18,6 +18,7 @@ Required Properties: - "mediatek,mt8135-infracfg", "syscon" - "mediatek,mt8173-infracfg", "syscon" - "mediatek,mt8183-infracfg", "syscon" + - "mediatek,mt8192-infracfg", "syscon" - "mediatek,mt8516-infracfg", "syscon" - #clock-cells: Must be 1 - #reset-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt index 2ce889b..9cd1035 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt @@ -7,6 +7,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt6779-ipesys", "syscon" + - "mediatek,mt8192-ipesys", "syscon" - #clock-cells: Must be 1 The ipesys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml new file mode 100644 index 0000000..88698a8 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mdpsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MDPSYS Controller + +maintainers: + - Weiyi Lu <weiyi.lu@mediatek.com> + +description: + The Mediatek mdpsys controller provides various clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-mdpsys + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +examples: + - | + mdpsys: mdpsys@1f000000 { + compatible = "mediatek,mt8192-mdpsys", "syscon"; + reg = <0 0x1f000000 0 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt index ad5f9d2..fc1ce61 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt @@ -9,6 +9,7 @@ Required Properties: - "mediatek,mt2712-mfgcfg", "syscon" - "mediatek,mt6779-mfgcfg", "syscon" - "mediatek,mt8183-mfgcfg", "syscon" + - "mediatek,mt8192-mfgcfg", "syscon" - #clock-cells: Must be 1 The mfgcfg controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt index d8c9108..81fa345 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -15,6 +15,7 @@ Required Properties: - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon" - "mediatek,mt8173-mmsys", "syscon" - "mediatek,mt8183-mmsys", "syscon" + - "mediatek,mt8192-mmsys", "syscon" - #clock-cells: Must be 1 For the clock control, the mmsys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml new file mode 100644 index 0000000..23ad419e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,msdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MSDC Controller + +maintainers: + - Weiyi Lu <weiyi.lu@mediatek.com> + +description: + The Mediatek msdc controller provides various clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-msdc + - mediatek,mt8192-msdc_top + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +examples: + - | + msdc: msdc@11f60000 { + compatible = "mediatek,mt8192-msdc", "syscon"; + reg = <0 0x11f60000 0 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml index e271c46..c2e106c 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml @@ -26,6 +26,7 @@ properties: - mediatek,mt8135-pericfg - mediatek,mt8173-pericfg - mediatek,mt8183-pericfg + - mediatek,mt8192-pericfg - mediatek,mt8516-pericfg - const: syscon - items: diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml new file mode 100644 index 0000000..25cc59f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,scp-adsp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SCP ADSP Controller + +maintainers: + - Weiyi Lu <weiyi.lu@mediatek.com> + +description: + The Mediatek scp adsp controller provides various clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-scp_adsp + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +examples: + - | + scp_adsp: scp_adsp@10720000 { + compatible = "mediatek,mt8192-scp_adsp", "syscon"; + reg = <0x10720000 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt index 9b0394c..c480278 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt @@ -17,6 +17,7 @@ Required Properties: - "mediatek,mt8135-topckgen" - "mediatek,mt8173-topckgen" - "mediatek,mt8183-topckgen", "syscon" + - "mediatek,mt8192-topckgen", "syscon" - "mediatek,mt8516-topckgen" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys-soc.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys-soc.yaml new file mode 100644 index 0000000..5cb8740 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys-soc.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,vdecsys-soc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek VDECSYS SOC Controller + +maintainers: + - Weiyi Lu <weiyi.lu@mediatek.com> + +description: + The Mediatek vdecsys soc controller provides various clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-vdecsys_soc + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +examples: + - | + vdecsys_soc: vdecsys_soc@1600f000 { + compatible = "mediatek,mt8192-vdecsys_soc", "syscon"; + reg = <0 0x1600f000 0 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt index 7894558..ee679e0 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt @@ -13,6 +13,7 @@ Required Properties: - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon" - "mediatek,mt8173-vdecsys", "syscon" - "mediatek,mt8183-vdecsys", "syscon" + - "mediatek,mt8192-vdecsys", "syscon" - #clock-cells: Must be 1 The vdecsys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt index 6a6a14e..d22de01 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt @@ -11,6 +11,7 @@ Required Properties: - "mediatek,mt6797-vencsys", "syscon" - "mediatek,mt8173-vencsys", "syscon" - "mediatek,mt8183-vencsys", "syscon" + - "mediatek,mt8192-vencsys", "syscon" - #clock-cells: Must be 1 The vencsys controller uses the common clk binding from
This patch adds the binding documentation for apmixedsys, audsys, camsys-raw, camsys, imgsys, imp_iic_wrap, infracfg, ipesys, mdpsys, mfgcfg, mmsys, msdc, pericfg, scp-adsp, topckgen, vdecsys-soc, vdecsys and vencsys for Mediatek MT8192. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> --- .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + .../bindings/arm/mediatek/mediatek,camsys-raw.yaml | 40 ++++++++++++++++++++ .../bindings/arm/mediatek/mediatek,camsys.txt | 1 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 2 + .../arm/mediatek/mediatek,imp_iic_wrap.yaml | 43 ++++++++++++++++++++++ .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 + .../bindings/arm/mediatek/mediatek,ipesys.txt | 1 + .../bindings/arm/mediatek/mediatek,mdpsys.yaml | 38 +++++++++++++++++++ .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../bindings/arm/mediatek/mediatek,msdc.yaml | 39 ++++++++++++++++++++ .../bindings/arm/mediatek/mediatek,pericfg.yaml | 1 + .../bindings/arm/mediatek/mediatek,scp-adsp.yaml | 38 +++++++++++++++++++ .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 + .../arm/mediatek/mediatek,vdecsys-soc.yaml | 38 +++++++++++++++++++ .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + .../bindings/arm/mediatek/mediatek,vencsys.txt | 1 + 18 files changed, 249 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys-soc.yaml