| Message ID | 1596104510-11113-6-git-send-email-crystal.guo@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v3,1/5] dt-binding: mediatek: watchdog: fix the description of compatible | expand |
On 7/30/20 3:21 AM, Crystal Guo wrote: > Add support for watchdog device found in MT8192 SoC > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/mtk_wdt.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c > index d6a6393..aef0c2d 100644 > --- a/drivers/watchdog/mtk_wdt.c > +++ b/drivers/watchdog/mtk_wdt.c > @@ -11,6 +11,7 @@ > > #include <dt-bindings/reset-controller/mt2712-resets.h> > #include <dt-bindings/reset-controller/mt8183-resets.h> > +#include <dt-bindings/reset-controller/mt8192-resets.h> > #include <linux/delay.h> > #include <linux/err.h> > #include <linux/init.h> > @@ -76,6 +77,10 @@ struct mtk_wdt_data { > .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, > }; > > +static const struct mtk_wdt_data mt8192_data = { > + .toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM, > +}; > + > static int toprgu_reset_update(struct reset_controller_dev *rcdev, > unsigned long id, bool assert) > { > @@ -322,6 +327,7 @@ static int mtk_wdt_resume(struct device *dev) > { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, > { .compatible = "mediatek,mt6589-wdt" }, > { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, > + { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids); >
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index d6a6393..aef0c2d 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -11,6 +11,7 @@ #include <dt-bindings/reset-controller/mt2712-resets.h> #include <dt-bindings/reset-controller/mt8183-resets.h> +#include <dt-bindings/reset-controller/mt8192-resets.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/init.h> @@ -76,6 +77,10 @@ struct mtk_wdt_data { .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM, }; +static const struct mtk_wdt_data mt8192_data = { + .toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM, +}; + static int toprgu_reset_update(struct reset_controller_dev *rcdev, unsigned long id, bool assert) { @@ -322,6 +327,7 @@ static int mtk_wdt_resume(struct device *dev) { .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data }, { .compatible = "mediatek,mt6589-wdt" }, { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, + { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);