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Fri, 21 Aug 2020 02:51:15 -0800 Received: from mtkmbs05n2.mediatek.inc (172.21.101.140) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 21 Aug 2020 03:44:40 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 21 Aug 2020 18:44:37 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 21 Aug 2020 18:44:39 +0800 From: Hsin-Hsiung Wang To: Stephen Boyd , Rob Herring , Matthias Brugger Subject: [PATCH v2 1/2] dt-bindings: spmi: document binding for the Mediatek SPMI controller Date: Fri, 21 Aug 2020 18:44:36 +0800 Message-ID: <1598006677-7953-2-git-send-email-hsin-hsiung.wang@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1598006677-7953-1-git-send-email-hsin-hsiung.wang@mediatek.com> References: <1598006677-7953-1-git-send-email-hsin-hsiung.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200821_065122_391428_73B673D5 X-CRM114-Status: GOOD ( 15.25 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, srv_heupstream@mediatek.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Hsin-Hsiung Wang , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org This adds documentation for the SPMI controller found on Mediatek SoCs. Signed-off-by: Hsin-Hsiung Wang --- .../devicetree/bindings/spmi/spmi-mtk-pmif.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/spmi/spmi-mtk-pmif.txt diff --git a/Documentation/devicetree/bindings/spmi/spmi-mtk-pmif.txt b/Documentation/devicetree/bindings/spmi/spmi-mtk-pmif.txt new file mode 100644 index 0000000..75a0eeb --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/spmi-mtk-pmif.txt @@ -0,0 +1,33 @@ +Mediatek SPMI Controller + +This document describes the binding for the MediaTek SPMI controller. + +On MediaTek SoCs the PMIC is connected via SPMI and the controller allows +for multiple SoCs to control a single SPMI master. + +Required properties: +- compatible : "mediatek,mt6873-spmi". +- reg-names : must contain: + "pmif" - pmif registers + "spmimst" - spmi controller registers +- reg: Must contain an entry for each entry in reg-names. +- clock-names: Must include the following entries: + "pmif_sys_ck": pmif system clock + "pmif_tmr_ck": pmif timer clock + "spmimst_clk_mux": spmi master clk mux +- clocks: Must contain an entry for each entry in clock-names. + +Example: + + spmi: spmi@10027000 { + compatible = "mediatek,mt6873-spmi"; + reg = <0 0x10027000 0 0x000e00>, + <0 0x10029000 0 0x000100>; + reg-names = "pmif", "spmimst"; + clocks = <&infracfg CLK_INFRA_PMIC_AP>, + <&infracfg CLK_INFRA_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_MST_SEL>; + clock-names = "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + };