diff mbox series

[v2,15/17] soc: mediatek: mmsys: add mt8192 mmsys support

Message ID 1607746317-4696-16-git-send-email-yongqiang.niu@mediatek.com (mailing list archive)
State New, archived
Headers show
Series drm/mediatek: add support for mediatek SOC MT8192 | expand

Commit Message

Yongqiang Niu Dec. 12, 2020, 4:11 a.m. UTC 
add mt8192 mmsys support

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/soc/mediatek/mmsys/Makefile       |   1 +
 drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 ++++++++++++++++++++++++++++++
 include/linux/soc/mediatek/mtk-mmsys.h    |   1 +
 3 files changed, 121 insertions(+)
 create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c

Comments

Chun-Kuang Hu Dec. 13, 2020, 4:02 p.m. UTC | #1 
Hi, Yongqiang:

Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月12日 週六 下午12:22寫道：
>
> add mt8192 mmsys support
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/soc/mediatek/mmsys/Makefile       |   1 +
>  drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 ++++++++++++++++++++++++++++++
>  include/linux/soc/mediatek/mtk-mmsys.h    |   1 +
>  3 files changed, 121 insertions(+)
>  create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c
>
> diff --git a/drivers/soc/mediatek/mmsys/Makefile b/drivers/soc/mediatek/mmsys/Makefile
> index 25eeb9e5..7508cd3 100644
> --- a/drivers/soc/mediatek/mmsys/Makefile
> +++ b/drivers/soc/mediatek/mmsys/Makefile
> @@ -1,4 +1,5 @@
>  # SPDX-License-Identifier: GPL-2.0-only
>  obj-$(CONFIG_MTK_MMSYS) += mt2701-mmsys.o
>  obj-$(CONFIG_MTK_MMSYS) += mt8183-mmsys.o
> +obj-$(CONFIG_MTK_MMSYS) += mt8192-mmsys.o
>  obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
> diff --git a/drivers/soc/mediatek/mmsys/mt8192-mmsys.c b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> new file mode 100644
> index 0000000..79cb33f
> --- /dev/null
> +++ b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> @@ -0,0 +1,119 @@
> +// SPDX-License-Identifier: GPL-2.0
> +//
> +// Copyright (c) 2020 MediaTek Inc.
> +
> +#include <linux/device.h>
> +#include <linux/io.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/soc/mediatek/mtk-mmsys.h>
> +
> +#define MMSYS_OVL_MOUT_EN              0xf04
> +#define DISP_OVL0_GO_BLEND                     BIT(0)
> +#define DISP_OVL0_GO_BG                                BIT(1)
> +#define DISP_OVL0_2L_GO_BLEND                  BIT(2)
> +#define DISP_OVL0_2L_GO_BG                     BIT(3)
> +#define DISP_OVL1_2L_MOUT_EN           0xf08
> +#define OVL1_2L_MOUT_EN_RDMA1                  BIT(4)
> +#define DISP_OVL0_2L_MOUT_EN           0xf18
> +#define DISP_OVL0_MOUT_EN              0xf1c
> +#define OVL0_MOUT_EN_DISP_RDMA0                        BIT(0)
> +#define OVL0_MOUT_EN_OVL0_2L                   BIT(4)
> +#define DISP_RDMA0_SEL_IN              0xf2c
> +#define RDMA0_SEL_IN_OVL0_2L                   0x3
> +#define DISP_RDMA0_SOUT_SEL            0xf30
> +#define RDMA0_SOUT_COLOR0                      0x1
> +#define DISP_CCORR0_SOUT_SEL           0xf34
> +#define CCORR0_SOUT_AAL0                       0x1
> +#define DISP_AAL0_SEL_IN               0xf38
> +#define AAL0_SEL_IN_CCORR0                     0x1
> +#define DISP_DITHER0_MOUT_EN           0xf3c
> +#define DITHER0_MOUT_DSI0                      BIT(0)
> +#define DISP_DSI0_SEL_IN               0xf40
> +#define DSI0_SEL_IN_DITHER0                    0x1
> +#define DISP_OVL2_2L_MOUT_EN           0xf4c
> +#define OVL2_2L_MOUT_RDMA4                     BIT(0)
> +
> +static unsigned int mtk_mmsys_ddp_mout_en(enum mtk_ddp_comp_id cur,
> +                                         enum mtk_ddp_comp_id next,
> +                                         unsigned int *addr)
> +{
> +       unsigned int value;
> +
> +       if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
> +               *addr = DISP_OVL0_2L_MOUT_EN;
> +               value = OVL0_MOUT_EN_DISP_RDMA0;
> +       } else if (cur == DDP_COMPONENT_OVL_2L2 && next == DDP_COMPONENT_RDMA4) {
> +               *addr = DISP_OVL2_2L_MOUT_EN;
> +               value = OVL2_2L_MOUT_RDMA4;
> +       } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
> +               *addr = DISP_DITHER0_MOUT_EN;
> +               value = DITHER0_MOUT_DSI0;
> +       } else {
> +               value = 0;
> +       }
> +
> +       return value;
> +}
> +
> +static unsigned int mtk_mmsys_ddp_sel_in(enum mtk_ddp_comp_id cur,
> +                                        enum mtk_ddp_comp_id next,
> +                                        unsigned int *addr)
> +{
> +       unsigned int value;
> +
> +       if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
> +               *addr = DISP_RDMA0_SEL_IN;
> +               value = RDMA0_SEL_IN_OVL0_2L;
> +       } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
> +               *addr = DISP_AAL0_SEL_IN;
> +               value = AAL0_SEL_IN_CCORR0;
> +       } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
> +               *addr = DISP_DSI0_SEL_IN;
> +               value = DSI0_SEL_IN_DITHER0;
> +       } else {
> +               value = 0;
> +       }
> +
> +       return value;
> +}
> +
> +static void mtk_mmsys_ddp_sout_sel(void __iomem *config_regs,
> +                                  enum mtk_ddp_comp_id cur,
> +                                  enum mtk_ddp_comp_id next)
> +{
> +       if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_COLOR0) {
> +               writel_relaxed(RDMA0_SOUT_COLOR0, config_regs + DISP_RDMA0_SOUT_SEL);
> +       } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
> +               writel_relaxed(CCORR0_SOUT_AAL0, config_regs + DISP_CCORR0_SOUT_SEL);
> +       }
> +}
> +
> +static unsigned int mtk_mmsys_ovl_mout_en(enum mtk_ddp_comp_id cur,
> +                                         enum mtk_ddp_comp_id next,
> +                                         unsigned int *addr)
> +{
> +       int value = -1;
> +
> +       *addr = MMSYS_OVL_MOUT_EN;
> +
> +       if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0)
> +               value = DISP_OVL0_GO_BG;
> +       else if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_OVL0)
> +               value = DISP_OVL0_2L_GO_BG;
> +       else if (cur == DDP_COMPONENT_OVL0)
> +               value = DISP_OVL0_GO_BLEND;
> +       else if (cur == DDP_COMPONENT_OVL_2L0)
> +               value = DISP_OVL0_2L_GO_BLEND;
> +       else
> +               value = -1;
> +
> +       return value;
> +}

I think you should squash mtk_mmsys_ovl_mout_en() with mtk_mmsys_ddp_mout_en().

Regards,
Chun-Kuang.

> +
> +struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs = {
> +       .mout_en = mtk_mmsys_ddp_mout_en,
> +       .ovl_mout_en = mtk_mmsys_ovl_mout_en,
> +       .sel_in = mtk_mmsys_ddp_sel_in,
> +       .sout_sel = mtk_mmsys_ddp_sout_sel,
> +};
> diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
> index 220203d..efa07b9 100644
> --- a/include/linux/soc/mediatek/mtk-mmsys.h
> +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> @@ -62,6 +62,7 @@ struct mtk_mmsys_conn_funcs {
>
>  extern struct mtk_mmsys_conn_funcs mt2701_mmsys_funcs;
>  extern struct mtk_mmsys_conn_funcs mt8183_mmsys_funcs;
> +extern struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs;
>
>  void mtk_mmsys_ddp_connect(struct device *dev,
>                            enum mtk_ddp_comp_id cur,
> --
> 1.8.1.1.dirty
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Yongqiang Niu Dec. 14, 2020, 12:39 a.m. UTC | #2 
On Mon, 2020-12-14 at 00:02 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
> 
> Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月12日 週六 下午12:22寫道：
> >
> > add mt8192 mmsys support
> >
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > ---
> >  drivers/soc/mediatek/mmsys/Makefile       |   1 +
> >  drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 ++++++++++++++++++++++++++++++
> >  include/linux/soc/mediatek/mtk-mmsys.h    |   1 +
> >  3 files changed, 121 insertions(+)
> >  create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> >
> > diff --git a/drivers/soc/mediatek/mmsys/Makefile b/drivers/soc/mediatek/mmsys/Makefile
> > index 25eeb9e5..7508cd3 100644
> > --- a/drivers/soc/mediatek/mmsys/Makefile
> > +++ b/drivers/soc/mediatek/mmsys/Makefile
> > @@ -1,4 +1,5 @@
> >  # SPDX-License-Identifier: GPL-2.0-only
> >  obj-$(CONFIG_MTK_MMSYS) += mt2701-mmsys.o
> >  obj-$(CONFIG_MTK_MMSYS) += mt8183-mmsys.o
> > +obj-$(CONFIG_MTK_MMSYS) += mt8192-mmsys.o
> >  obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
> > diff --git a/drivers/soc/mediatek/mmsys/mt8192-mmsys.c b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> > new file mode 100644
> > index 0000000..79cb33f
> > --- /dev/null
> > +++ b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> > @@ -0,0 +1,119 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +//
> > +// Copyright (c) 2020 MediaTek Inc.
> > +
> > +#include <linux/device.h>
> > +#include <linux/io.h>
> > +#include <linux/of_device.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/soc/mediatek/mtk-mmsys.h>
> > +
> > +#define MMSYS_OVL_MOUT_EN              0xf04
> > +#define DISP_OVL0_GO_BLEND                     BIT(0)
> > +#define DISP_OVL0_GO_BG                                BIT(1)
> > +#define DISP_OVL0_2L_GO_BLEND                  BIT(2)
> > +#define DISP_OVL0_2L_GO_BG                     BIT(3)
> > +#define DISP_OVL1_2L_MOUT_EN           0xf08
> > +#define OVL1_2L_MOUT_EN_RDMA1                  BIT(4)
> > +#define DISP_OVL0_2L_MOUT_EN           0xf18
> > +#define DISP_OVL0_MOUT_EN              0xf1c
> > +#define OVL0_MOUT_EN_DISP_RDMA0                        BIT(0)
> > +#define OVL0_MOUT_EN_OVL0_2L                   BIT(4)
> > +#define DISP_RDMA0_SEL_IN              0xf2c
> > +#define RDMA0_SEL_IN_OVL0_2L                   0x3
> > +#define DISP_RDMA0_SOUT_SEL            0xf30
> > +#define RDMA0_SOUT_COLOR0                      0x1
> > +#define DISP_CCORR0_SOUT_SEL           0xf34
> > +#define CCORR0_SOUT_AAL0                       0x1
> > +#define DISP_AAL0_SEL_IN               0xf38
> > +#define AAL0_SEL_IN_CCORR0                     0x1
> > +#define DISP_DITHER0_MOUT_EN           0xf3c
> > +#define DITHER0_MOUT_DSI0                      BIT(0)
> > +#define DISP_DSI0_SEL_IN               0xf40
> > +#define DSI0_SEL_IN_DITHER0                    0x1
> > +#define DISP_OVL2_2L_MOUT_EN           0xf4c
> > +#define OVL2_2L_MOUT_RDMA4                     BIT(0)
> > +
> > +static unsigned int mtk_mmsys_ddp_mout_en(enum mtk_ddp_comp_id cur,
> > +                                         enum mtk_ddp_comp_id next,
> > +                                         unsigned int *addr)
> > +{
> > +       unsigned int value;
> > +
> > +       if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
> > +               *addr = DISP_OVL0_2L_MOUT_EN;
> > +               value = OVL0_MOUT_EN_DISP_RDMA0;
> > +       } else if (cur == DDP_COMPONENT_OVL_2L2 && next == DDP_COMPONENT_RDMA4) {
> > +               *addr = DISP_OVL2_2L_MOUT_EN;
> > +               value = OVL2_2L_MOUT_RDMA4;
> > +       } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
> > +               *addr = DISP_DITHER0_MOUT_EN;
> > +               value = DITHER0_MOUT_DSI0;
> > +       } else {
> > +               value = 0;
> > +       }
> > +
> > +       return value;
> > +}
> > +
> > +static unsigned int mtk_mmsys_ddp_sel_in(enum mtk_ddp_comp_id cur,
> > +                                        enum mtk_ddp_comp_id next,
> > +                                        unsigned int *addr)
> > +{
> > +       unsigned int value;
> > +
> > +       if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
> > +               *addr = DISP_RDMA0_SEL_IN;
> > +               value = RDMA0_SEL_IN_OVL0_2L;
> > +       } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
> > +               *addr = DISP_AAL0_SEL_IN;
> > +               value = AAL0_SEL_IN_CCORR0;
> > +       } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
> > +               *addr = DISP_DSI0_SEL_IN;
> > +               value = DSI0_SEL_IN_DITHER0;
> > +       } else {
> > +               value = 0;
> > +       }
> > +
> > +       return value;
> > +}
> > +
> > +static void mtk_mmsys_ddp_sout_sel(void __iomem *config_regs,
> > +                                  enum mtk_ddp_comp_id cur,
> > +                                  enum mtk_ddp_comp_id next)
> > +{
> > +       if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_COLOR0) {
> > +               writel_relaxed(RDMA0_SOUT_COLOR0, config_regs + DISP_RDMA0_SOUT_SEL);
> > +       } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
> > +               writel_relaxed(CCORR0_SOUT_AAL0, config_regs + DISP_CCORR0_SOUT_SEL);
> > +       }
> > +}
> > +
> > +static unsigned int mtk_mmsys_ovl_mout_en(enum mtk_ddp_comp_id cur,
> > +                                         enum mtk_ddp_comp_id next,
> > +                                         unsigned int *addr)
> > +{
> > +       int value = -1;
> > +
> > +       *addr = MMSYS_OVL_MOUT_EN;
> > +
> > +       if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0)
> > +               value = DISP_OVL0_GO_BG;
> > +       else if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_OVL0)
> > +               value = DISP_OVL0_2L_GO_BG;
> > +       else if (cur == DDP_COMPONENT_OVL0)
> > +               value = DISP_OVL0_GO_BLEND;
> > +       else if (cur == DDP_COMPONENT_OVL_2L0)
> > +               value = DISP_OVL0_2L_GO_BLEND;
> > +       else
> > +               value = -1;
> > +
> > +       return value;
> > +}
> 
> I think you should squash mtk_mmsys_ovl_mout_en() with mtk_mmsys_ddp_mout_en().
> 
> Regards,
> Chun-Kuang.

hi 

in soc mt8192,  ovl0_2l -> rdma0 usecase need set 2 register:
DISP_OVL0_2L_MOUT_EN and MMSYS_OVL_MOUT_EN,
'if-else' in mtk_mmsys_ddp_mout_en can not cover this case.

> 
> > +
> > +struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs = {
> > +       .mout_en = mtk_mmsys_ddp_mout_en,
> > +       .ovl_mout_en = mtk_mmsys_ovl_mout_en,
> > +       .sel_in = mtk_mmsys_ddp_sel_in,
> > +       .sout_sel = mtk_mmsys_ddp_sout_sel,
> > +};
> > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
> > index 220203d..efa07b9 100644
> > --- a/include/linux/soc/mediatek/mtk-mmsys.h
> > +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> > @@ -62,6 +62,7 @@ struct mtk_mmsys_conn_funcs {
> >
> >  extern struct mtk_mmsys_conn_funcs mt2701_mmsys_funcs;
> >  extern struct mtk_mmsys_conn_funcs mt8183_mmsys_funcs;
> > +extern struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs;
> >
> >  void mtk_mmsys_ddp_connect(struct device *dev,
> >                            enum mtk_ddp_comp_id cur,
> > --
> > 1.8.1.1.dirty
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Chun-Kuang Hu Dec. 15, 2020, 2:44 p.m. UTC | #3 
Hi, Yongqiang:

Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月14日 週一 上午8:39寫道：
>
> On Mon, 2020-12-14 at 00:02 +0800, Chun-Kuang Hu wrote:
> > Hi, Yongqiang:
> >
> > Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月12日 週六 下午12:22寫道：
> > >
> > > add mt8192 mmsys support
> > >
> > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > > ---
> > >  drivers/soc/mediatek/mmsys/Makefile       |   1 +
> > >  drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 ++++++++++++++++++++++++++++++
> > >  include/linux/soc/mediatek/mtk-mmsys.h    |   1 +
> > >  3 files changed, 121 insertions(+)
> > >  create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> > >
> > > diff --git a/drivers/soc/mediatek/mmsys/Makefile b/drivers/soc/mediatek/mmsys/Makefile
> > > index 25eeb9e5..7508cd3 100644
> > > --- a/drivers/soc/mediatek/mmsys/Makefile
> > > +++ b/drivers/soc/mediatek/mmsys/Makefile
> > > @@ -1,4 +1,5 @@
> > >  # SPDX-License-Identifier: GPL-2.0-only
> > >  obj-$(CONFIG_MTK_MMSYS) += mt2701-mmsys.o
> > >  obj-$(CONFIG_MTK_MMSYS) += mt8183-mmsys.o
> > > +obj-$(CONFIG_MTK_MMSYS) += mt8192-mmsys.o
> > >  obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
> > > diff --git a/drivers/soc/mediatek/mmsys/mt8192-mmsys.c b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> > > new file mode 100644
> > > index 0000000..79cb33f
> > > --- /dev/null
> > > +++ b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> > > @@ -0,0 +1,119 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +//
> > > +// Copyright (c) 2020 MediaTek Inc.
> > > +
> > > +#include <linux/device.h>
> > > +#include <linux/io.h>
> > > +#include <linux/of_device.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/soc/mediatek/mtk-mmsys.h>
> > > +
> > > +#define MMSYS_OVL_MOUT_EN              0xf04
> > > +#define DISP_OVL0_GO_BLEND                     BIT(0)
> > > +#define DISP_OVL0_GO_BG                                BIT(1)
> > > +#define DISP_OVL0_2L_GO_BLEND                  BIT(2)
> > > +#define DISP_OVL0_2L_GO_BG                     BIT(3)
> > > +#define DISP_OVL1_2L_MOUT_EN           0xf08
> > > +#define OVL1_2L_MOUT_EN_RDMA1                  BIT(4)
> > > +#define DISP_OVL0_2L_MOUT_EN           0xf18
> > > +#define DISP_OVL0_MOUT_EN              0xf1c
> > > +#define OVL0_MOUT_EN_DISP_RDMA0                        BIT(0)
> > > +#define OVL0_MOUT_EN_OVL0_2L                   BIT(4)
> > > +#define DISP_RDMA0_SEL_IN              0xf2c
> > > +#define RDMA0_SEL_IN_OVL0_2L                   0x3
> > > +#define DISP_RDMA0_SOUT_SEL            0xf30
> > > +#define RDMA0_SOUT_COLOR0                      0x1
> > > +#define DISP_CCORR0_SOUT_SEL           0xf34
> > > +#define CCORR0_SOUT_AAL0                       0x1
> > > +#define DISP_AAL0_SEL_IN               0xf38
> > > +#define AAL0_SEL_IN_CCORR0                     0x1
> > > +#define DISP_DITHER0_MOUT_EN           0xf3c
> > > +#define DITHER0_MOUT_DSI0                      BIT(0)
> > > +#define DISP_DSI0_SEL_IN               0xf40
> > > +#define DSI0_SEL_IN_DITHER0                    0x1
> > > +#define DISP_OVL2_2L_MOUT_EN           0xf4c
> > > +#define OVL2_2L_MOUT_RDMA4                     BIT(0)
> > > +
> > > +static unsigned int mtk_mmsys_ddp_mout_en(enum mtk_ddp_comp_id cur,
> > > +                                         enum mtk_ddp_comp_id next,
> > > +                                         unsigned int *addr)
> > > +{
> > > +       unsigned int value;
> > > +
> > > +       if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
> > > +               *addr = DISP_OVL0_2L_MOUT_EN;
> > > +               value = OVL0_MOUT_EN_DISP_RDMA0;
> > > +       } else if (cur == DDP_COMPONENT_OVL_2L2 && next == DDP_COMPONENT_RDMA4) {
> > > +               *addr = DISP_OVL2_2L_MOUT_EN;
> > > +               value = OVL2_2L_MOUT_RDMA4;
> > > +       } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
> > > +               *addr = DISP_DITHER0_MOUT_EN;
> > > +               value = DITHER0_MOUT_DSI0;
> > > +       } else {
> > > +               value = 0;
> > > +       }
> > > +
> > > +       return value;
> > > +}
> > > +
> > > +static unsigned int mtk_mmsys_ddp_sel_in(enum mtk_ddp_comp_id cur,
> > > +                                        enum mtk_ddp_comp_id next,
> > > +                                        unsigned int *addr)
> > > +{
> > > +       unsigned int value;
> > > +
> > > +       if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
> > > +               *addr = DISP_RDMA0_SEL_IN;
> > > +               value = RDMA0_SEL_IN_OVL0_2L;
> > > +       } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
> > > +               *addr = DISP_AAL0_SEL_IN;
> > > +               value = AAL0_SEL_IN_CCORR0;
> > > +       } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
> > > +               *addr = DISP_DSI0_SEL_IN;
> > > +               value = DSI0_SEL_IN_DITHER0;
> > > +       } else {
> > > +               value = 0;
> > > +       }
> > > +
> > > +       return value;
> > > +}
> > > +
> > > +static void mtk_mmsys_ddp_sout_sel(void __iomem *config_regs,
> > > +                                  enum mtk_ddp_comp_id cur,
> > > +                                  enum mtk_ddp_comp_id next)
> > > +{
> > > +       if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_COLOR0) {
> > > +               writel_relaxed(RDMA0_SOUT_COLOR0, config_regs + DISP_RDMA0_SOUT_SEL);
> > > +       } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
> > > +               writel_relaxed(CCORR0_SOUT_AAL0, config_regs + DISP_CCORR0_SOUT_SEL);
> > > +       }
> > > +}
> > > +
> > > +static unsigned int mtk_mmsys_ovl_mout_en(enum mtk_ddp_comp_id cur,
> > > +                                         enum mtk_ddp_comp_id next,
> > > +                                         unsigned int *addr)
> > > +{
> > > +       int value = -1;
> > > +
> > > +       *addr = MMSYS_OVL_MOUT_EN;
> > > +
> > > +       if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0)
> > > +               value = DISP_OVL0_GO_BG;
> > > +       else if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_OVL0)
> > > +               value = DISP_OVL0_2L_GO_BG;
> > > +       else if (cur == DDP_COMPONENT_OVL0)
> > > +               value = DISP_OVL0_GO_BLEND;
> > > +       else if (cur == DDP_COMPONENT_OVL_2L0)
> > > +               value = DISP_OVL0_2L_GO_BLEND;
> > > +       else
> > > +               value = -1;
> > > +
> > > +       return value;
> > > +}
> >
> > I think you should squash mtk_mmsys_ovl_mout_en() with mtk_mmsys_ddp_mout_en().
> >
> > Regards,
> > Chun-Kuang.
>
> hi
>
> in soc mt8192,  ovl0_2l -> rdma0 usecase need set 2 register:
> DISP_OVL0_2L_MOUT_EN and MMSYS_OVL_MOUT_EN,
> 'if-else' in mtk_mmsys_ddp_mout_en can not cover this case.
>

I think mtk_mmsys_ddp_mout_en() could work as mtk_mmsys_ddp_mout_en().
This mean that mtk_mmsys_ddp_mout_en() could write register inside it
rather than return value and write register in
mtk_mmsys_ddp_connect().

Regards,
Chun-Kuang.

> >
> > > +
> > > +struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs = {
> > > +       .mout_en = mtk_mmsys_ddp_mout_en,
> > > +       .ovl_mout_en = mtk_mmsys_ovl_mout_en,
> > > +       .sel_in = mtk_mmsys_ddp_sel_in,
> > > +       .sout_sel = mtk_mmsys_ddp_sout_sel,
> > > +};
> > > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
> > > index 220203d..efa07b9 100644
> > > --- a/include/linux/soc/mediatek/mtk-mmsys.h
> > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> > > @@ -62,6 +62,7 @@ struct mtk_mmsys_conn_funcs {
> > >
> > >  extern struct mtk_mmsys_conn_funcs mt2701_mmsys_funcs;
> > >  extern struct mtk_mmsys_conn_funcs mt8183_mmsys_funcs;
> > > +extern struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs;
> > >
> > >  void mtk_mmsys_ddp_connect(struct device *dev,
> > >                            enum mtk_ddp_comp_id cur,
> > > --
> > > 1.8.1.1.dirty
> > > _______________________________________________
> > > Linux-mediatek mailing list
> > > Linux-mediatek@lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
>
diff mbox series

Patch

diff --git a/drivers/soc/mediatek/mmsys/Makefile b/drivers/soc/mediatek/mmsys/Makefile
index 25eeb9e5..7508cd3 100644
--- a/drivers/soc/mediatek/mmsys/Makefile
+++ b/drivers/soc/mediatek/mmsys/Makefile
@@ -1,4 +1,5 @@ 
 # SPDX-License-Identifier: GPL-2.0-only
 obj-$(CONFIG_MTK_MMSYS) += mt2701-mmsys.o
 obj-$(CONFIG_MTK_MMSYS) += mt8183-mmsys.o
+obj-$(CONFIG_MTK_MMSYS) += mt8192-mmsys.o
 obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
diff --git a/drivers/soc/mediatek/mmsys/mt8192-mmsys.c b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
new file mode 100644
index 0000000..79cb33f
--- /dev/null
+++ b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
@@ -0,0 +1,119 @@ 
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 MediaTek Inc.
+
+#include <linux/device.h>
+#include <linux/io.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/soc/mediatek/mtk-mmsys.h>
+
+#define MMSYS_OVL_MOUT_EN		0xf04
+#define DISP_OVL0_GO_BLEND			BIT(0)
+#define DISP_OVL0_GO_BG				BIT(1)
+#define DISP_OVL0_2L_GO_BLEND			BIT(2)
+#define DISP_OVL0_2L_GO_BG			BIT(3)
+#define DISP_OVL1_2L_MOUT_EN		0xf08
+#define OVL1_2L_MOUT_EN_RDMA1			BIT(4)
+#define DISP_OVL0_2L_MOUT_EN		0xf18
+#define DISP_OVL0_MOUT_EN		0xf1c
+#define OVL0_MOUT_EN_DISP_RDMA0			BIT(0)
+#define OVL0_MOUT_EN_OVL0_2L			BIT(4)
+#define DISP_RDMA0_SEL_IN		0xf2c
+#define RDMA0_SEL_IN_OVL0_2L			0x3
+#define DISP_RDMA0_SOUT_SEL		0xf30
+#define RDMA0_SOUT_COLOR0			0x1
+#define DISP_CCORR0_SOUT_SEL		0xf34
+#define CCORR0_SOUT_AAL0			0x1
+#define DISP_AAL0_SEL_IN		0xf38
+#define AAL0_SEL_IN_CCORR0			0x1
+#define DISP_DITHER0_MOUT_EN		0xf3c
+#define DITHER0_MOUT_DSI0			BIT(0)
+#define DISP_DSI0_SEL_IN		0xf40
+#define DSI0_SEL_IN_DITHER0			0x1
+#define DISP_OVL2_2L_MOUT_EN		0xf4c
+#define OVL2_2L_MOUT_RDMA4			BIT(0)
+
+static unsigned int mtk_mmsys_ddp_mout_en(enum mtk_ddp_comp_id cur,
+					  enum mtk_ddp_comp_id next,
+					  unsigned int *addr)
+{
+	unsigned int value;
+
+	if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
+		*addr = DISP_OVL0_2L_MOUT_EN;
+		value = OVL0_MOUT_EN_DISP_RDMA0;
+	} else if (cur == DDP_COMPONENT_OVL_2L2 && next == DDP_COMPONENT_RDMA4) {
+		*addr = DISP_OVL2_2L_MOUT_EN;
+		value = OVL2_2L_MOUT_RDMA4;
+	} else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
+		*addr = DISP_DITHER0_MOUT_EN;
+		value = DITHER0_MOUT_DSI0;
+	} else {
+		value = 0;
+	}
+
+	return value;
+}
+
+static unsigned int mtk_mmsys_ddp_sel_in(enum mtk_ddp_comp_id cur,
+					 enum mtk_ddp_comp_id next,
+					 unsigned int *addr)
+{
+	unsigned int value;
+
+	if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
+		*addr = DISP_RDMA0_SEL_IN;
+		value = RDMA0_SEL_IN_OVL0_2L;
+	} else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
+		*addr = DISP_AAL0_SEL_IN;
+		value = AAL0_SEL_IN_CCORR0;
+	} else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
+		*addr = DISP_DSI0_SEL_IN;
+		value = DSI0_SEL_IN_DITHER0;
+	} else {
+		value = 0;
+	}
+
+	return value;
+}
+
+static void mtk_mmsys_ddp_sout_sel(void __iomem *config_regs,
+				   enum mtk_ddp_comp_id cur,
+				   enum mtk_ddp_comp_id next)
+{
+	if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_COLOR0) {
+		writel_relaxed(RDMA0_SOUT_COLOR0, config_regs + DISP_RDMA0_SOUT_SEL);
+	} else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
+		writel_relaxed(CCORR0_SOUT_AAL0, config_regs + DISP_CCORR0_SOUT_SEL);
+	}
+}
+
+static unsigned int mtk_mmsys_ovl_mout_en(enum mtk_ddp_comp_id cur,
+					  enum mtk_ddp_comp_id next,
+					  unsigned int *addr)
+{
+	int value = -1;
+
+	*addr = MMSYS_OVL_MOUT_EN;
+
+	if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0)
+		value = DISP_OVL0_GO_BG;
+	else if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_OVL0)
+		value = DISP_OVL0_2L_GO_BG;
+	else if (cur == DDP_COMPONENT_OVL0)
+		value = DISP_OVL0_GO_BLEND;
+	else if (cur == DDP_COMPONENT_OVL_2L0)
+		value = DISP_OVL0_2L_GO_BLEND;
+	else
+		value = -1;
+
+	return value;
+}
+
+struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs = {
+	.mout_en = mtk_mmsys_ddp_mout_en,
+	.ovl_mout_en = mtk_mmsys_ovl_mout_en,
+	.sel_in = mtk_mmsys_ddp_sel_in,
+	.sout_sel = mtk_mmsys_ddp_sout_sel,
+};
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
index 220203d..efa07b9 100644
--- a/include/linux/soc/mediatek/mtk-mmsys.h
+++ b/include/linux/soc/mediatek/mtk-mmsys.h
@@ -62,6 +62,7 @@  struct mtk_mmsys_conn_funcs {
 
 extern struct mtk_mmsys_conn_funcs mt2701_mmsys_funcs;
 extern struct mtk_mmsys_conn_funcs mt8183_mmsys_funcs;
+extern struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs;
 
 void mtk_mmsys_ddp_connect(struct device *dev,
 			   enum mtk_ddp_comp_id cur,