| Message ID | 1647503611-13144-4-git-send-email-xinlei.lee@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Cooperate with DSI RX devices to modify dsi funcs and delay mipi high to cooperate with panel sequence | expand |
Hello Xinlei, On Thu, 2022-03-17 at 15:53 +0800, xinlei.lee@mediatek.com wrote: > From: Jitao Shi <jitao.shi@mediatek.com> > > To comply with the panel sequence, hold the mipi signal to LP00 Could you provide a example panel power sequence to let me understand that? Maybe you can put them in commit message. > before the dcs cmds transmission, > and pull the mipi signal high from LP00 to LP11 until the start of > the dcs cmds transmission. Maybe you can try to write as: To comply with... - Hold the mipi signal... - Pul the miip signal high.... > If dsi is not in cmd mode, then dsi will pull the mipi signal high in > the mtk_output_dsi_enable function. > > Fixes: 2dd8075d2185 ("drm/mediatek: mtk_dsi: Use the drm_panel_bridge > API") > Can you remove this blank line? > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 31 +++++++++++++++++++++++----- > -- > 1 file changed, 24 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c > b/drivers/gpu/drm/mediatek/mtk_dsi.c > index e33caaca11a7..b509d59235e2 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -203,6 +203,7 @@ struct mtk_dsi { > struct mtk_phy_timing phy_timing; > int refcount; > bool enabled; > + bool lanes_ready; > u32 irq_data; > wait_queue_head_t irq_wait_queue; > const struct mtk_dsi_driver_data *driver_data; > @@ -654,13 +655,6 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) > mtk_dsi_config_vdo_timing(dsi); > mtk_dsi_set_interrupt_enable(dsi); > > - mtk_dsi_rxtx_control(dsi); > - usleep_range(30, 100); > - mtk_dsi_reset_dphy(dsi); > - mtk_dsi_clk_ulp_mode_leave(dsi); > - mtk_dsi_lane0_ulp_mode_leave(dsi); > - mtk_dsi_clk_hs_mode(dsi, 0); > - > return 0; > err_disable_engine_clk: > clk_disable_unprepare(dsi->engine_clk); > @@ -689,6 +683,8 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi) > clk_disable_unprepare(dsi->digital_clk); > > phy_power_off(dsi->phy); > + > + dsi->lanes_ready = false; > } > > static void mtk_output_dsi_enable(struct mtk_dsi *dsi) > @@ -696,6 +692,16 @@ static void mtk_output_dsi_enable(struct mtk_dsi > *dsi) > if (dsi->enabled) > return; > > + if (!dsi->lanes_ready) { > + dsi->lanes_ready = true; > + mtk_dsi_rxtx_control(dsi); > + usleep_range(30, 100); > + mtk_dsi_reset_dphy(dsi); > + mtk_dsi_clk_ulp_mode_leave(dsi); > + mtk_dsi_lane0_ulp_mode_leave(dsi); > + mtk_dsi_clk_hs_mode(dsi, 0); > + } > + > mtk_dsi_set_mode(dsi); > mtk_dsi_clk_hs_mode(dsi, 1); > > @@ -995,6 +1001,17 @@ static ssize_t mtk_dsi_host_transfer(struct > mipi_dsi_host *host, > if (MTK_DSI_HOST_IS_READ(msg->type)) > irq_flag |= LPRX_RD_RDY_INT_FLAG; > > + if (!dsi->lanes_ready) { > + dsi->lanes_ready = true; > + mtk_dsi_rxtx_control(dsi); > + usleep_range(30, 100); > + mtk_dsi_reset_dphy(dsi); > + mtk_dsi_clk_ulp_mode_leave(dsi); > + mtk_dsi_lane0_ulp_mode_leave(dsi); > + mtk_dsi_clk_hs_mode(dsi, 0); The drivers are the same with previous modification. I think you can use a funtion for them? > + msleep(20); Why delay 20ms but not in mtk_output_dsi_enable? BRs, Rex > + } > + > ret = mtk_dsi_host_send_cmd(dsi, msg, irq_flag); > if (ret) > goto restore_dsi_mode;
On Thu, 2022-03-17 at 20:06 +0800, Rex-BC Chen wrote: > Hello Xinlei, > > On Thu, 2022-03-17 at 15:53 +0800, xinlei.lee@mediatek.com wrote: > > From: Jitao Shi <jitao.shi@mediatek.com> > > > > To comply with the panel sequence, hold the mipi signal to LP00 > > Could you provide a example panel power sequence to let me understand > that? > Maybe you can put them in commit message. > > > before the dcs cmds transmission, > > and pull the mipi signal high from LP00 to LP11 until the start of > > the dcs cmds transmission. > > Maybe you can try to write as: > To comply with... > - Hold the mipi signal... > - Pul the miip signal high.... > > > If dsi is not in cmd mode, then dsi will pull the mipi signal high > > in > > the mtk_output_dsi_enable function. > > > > Fixes: 2dd8075d2185 ("drm/mediatek: mtk_dsi: Use the > > drm_panel_bridge > > API") > > > > Can you remove this blank line? > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dsi.c | 31 +++++++++++++++++++++++--- > > -- > > -- > > 1 file changed, 24 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c > > b/drivers/gpu/drm/mediatek/mtk_dsi.c > > index e33caaca11a7..b509d59235e2 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > > @@ -203,6 +203,7 @@ struct mtk_dsi { > > struct mtk_phy_timing phy_timing; > > int refcount; > > bool enabled; > > + bool lanes_ready; > > u32 irq_data; > > wait_queue_head_t irq_wait_queue; > > const struct mtk_dsi_driver_data *driver_data; > > @@ -654,13 +655,6 @@ static int mtk_dsi_poweron(struct mtk_dsi > > *dsi) > > mtk_dsi_config_vdo_timing(dsi); > > mtk_dsi_set_interrupt_enable(dsi); > > > > - mtk_dsi_rxtx_control(dsi); > > - usleep_range(30, 100); > > - mtk_dsi_reset_dphy(dsi); > > - mtk_dsi_clk_ulp_mode_leave(dsi); > > - mtk_dsi_lane0_ulp_mode_leave(dsi); > > - mtk_dsi_clk_hs_mode(dsi, 0); > > - > > return 0; > > err_disable_engine_clk: > > clk_disable_unprepare(dsi->engine_clk); > > @@ -689,6 +683,8 @@ static void mtk_dsi_poweroff(struct mtk_dsi > > *dsi) > > clk_disable_unprepare(dsi->digital_clk); > > > > phy_power_off(dsi->phy); > > + > > + dsi->lanes_ready = false; > > } > > > > static void mtk_output_dsi_enable(struct mtk_dsi *dsi) > > @@ -696,6 +692,16 @@ static void mtk_output_dsi_enable(struct > > mtk_dsi > > *dsi) > > if (dsi->enabled) > > return; > > > > + if (!dsi->lanes_ready) { > > + dsi->lanes_ready = true; > > + mtk_dsi_rxtx_control(dsi); > > + usleep_range(30, 100); > > + mtk_dsi_reset_dphy(dsi); > > + mtk_dsi_clk_ulp_mode_leave(dsi); > > + mtk_dsi_lane0_ulp_mode_leave(dsi); > > + mtk_dsi_clk_hs_mode(dsi, 0); > > + } > > + > > mtk_dsi_set_mode(dsi); > > mtk_dsi_clk_hs_mode(dsi, 1); > > > > @@ -995,6 +1001,17 @@ static ssize_t mtk_dsi_host_transfer(struct > > mipi_dsi_host *host, > > if (MTK_DSI_HOST_IS_READ(msg->type)) > > irq_flag |= LPRX_RD_RDY_INT_FLAG; > > > > + if (!dsi->lanes_ready) { > > + dsi->lanes_ready = true; > > + mtk_dsi_rxtx_control(dsi); > > + usleep_range(30, 100); > > + mtk_dsi_reset_dphy(dsi); > > + mtk_dsi_clk_ulp_mode_leave(dsi); > > + mtk_dsi_lane0_ulp_mode_leave(dsi); > > + mtk_dsi_clk_hs_mode(dsi, 0); > > The drivers are the same with previous modification. > I think you can use a funtion for them? > > > + msleep(20); > > Why delay 20ms but not in mtk_output_dsi_enable? > > BRs, > Rex > > + } > > + > > ret = mtk_dsi_host_send_cmd(dsi, msg, irq_flag); > > if (ret) > > goto restore_dsi_mode; > > Hi rex: Thanks for your review. 1.The normal panel timing is as follows (I will add to the commit message in the next version): (1) pp1800 DC pull up (2) avdd & avee AC pull high (3) lcm_reset pull high -> pull low -> pull high (4) Pull MIPI signal high (LP11) -> initial code -> send video data(HS mode) The power-off sequence is reversed. 2. The 20ms delay in dsi_host_transfer is because dsi needs to give dsi_rx(panel) a reaction time after pulling up the mipi signal. If you suggest encapsulating it as a function I will add a delay to mtk_output_dsi_enable in the next version as well. Best Regards! xinlei
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index e33caaca11a7..b509d59235e2 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -203,6 +203,7 @@ struct mtk_dsi { struct mtk_phy_timing phy_timing; int refcount; bool enabled; + bool lanes_ready; u32 irq_data; wait_queue_head_t irq_wait_queue; const struct mtk_dsi_driver_data *driver_data; @@ -654,13 +655,6 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) mtk_dsi_config_vdo_timing(dsi); mtk_dsi_set_interrupt_enable(dsi); - mtk_dsi_rxtx_control(dsi); - usleep_range(30, 100); - mtk_dsi_reset_dphy(dsi); - mtk_dsi_clk_ulp_mode_leave(dsi); - mtk_dsi_lane0_ulp_mode_leave(dsi); - mtk_dsi_clk_hs_mode(dsi, 0); - return 0; err_disable_engine_clk: clk_disable_unprepare(dsi->engine_clk); @@ -689,6 +683,8 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi) clk_disable_unprepare(dsi->digital_clk); phy_power_off(dsi->phy); + + dsi->lanes_ready = false; } static void mtk_output_dsi_enable(struct mtk_dsi *dsi) @@ -696,6 +692,16 @@ static void mtk_output_dsi_enable(struct mtk_dsi *dsi) if (dsi->enabled) return; + if (!dsi->lanes_ready) { + dsi->lanes_ready = true; + mtk_dsi_rxtx_control(dsi); + usleep_range(30, 100); + mtk_dsi_reset_dphy(dsi); + mtk_dsi_clk_ulp_mode_leave(dsi); + mtk_dsi_lane0_ulp_mode_leave(dsi); + mtk_dsi_clk_hs_mode(dsi, 0); + } + mtk_dsi_set_mode(dsi); mtk_dsi_clk_hs_mode(dsi, 1); @@ -995,6 +1001,17 @@ static ssize_t mtk_dsi_host_transfer(struct mipi_dsi_host *host, if (MTK_DSI_HOST_IS_READ(msg->type)) irq_flag |= LPRX_RD_RDY_INT_FLAG; + if (!dsi->lanes_ready) { + dsi->lanes_ready = true; + mtk_dsi_rxtx_control(dsi); + usleep_range(30, 100); + mtk_dsi_reset_dphy(dsi); + mtk_dsi_clk_ulp_mode_leave(dsi); + mtk_dsi_lane0_ulp_mode_leave(dsi); + mtk_dsi_clk_hs_mode(dsi, 0); + msleep(20); + } + ret = mtk_dsi_host_send_cmd(dsi, msg, irq_flag); if (ret) goto restore_dsi_mode;