| Message ID | 1662384863-17281-3-git-send-email-xinlei.lee@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add dpi output format control for MT8186 | expand |
Hi, Xinlei: On Mon, 2022-09-05 at 21:34 +0800, xinlei.lee@mediatek.com wrote: > From: Xinlei Lee <xinlei.lee@mediatek.com> > > Dpi output needs to adjust the output format to dual edge for MT8186. Separate this patch into two patches. One is adding edge_cfg_in_mmsys, and another one is adding mt8186 dpi support. I think the default value in mmsys (single edge) should work for some display so that mmsys hardware use single edge for default value. So I need you to describe more information why we need dual edge. > > Co-developed-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > Reviewed-by: Nílas F. R. A. Prado <nfraprado@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 31 > +++++++++++++++++++++++++ > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 5 ++++ > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++ > 3 files changed, 38 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 630a4e301ef6..ffe4a4b70a0f 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -15,6 +15,7 @@ > #include <linux/of_graph.h> > #include <linux/pinctrl/consumer.h> > #include <linux/platform_device.h> > +#include <linux/soc/mediatek/mtk-mmsys.h> > #include <linux/types.h> > > #include <video/videomode.h> > @@ -30,6 +31,7 @@ > #include "mtk_disp_drv.h" > #include "mtk_dpi_regs.h" > #include "mtk_drm_ddp_comp.h" > +#include "mtk_drm_drv.h" > > enum mtk_dpi_out_bit_num { > MTK_DPI_OUT_BIT_NUM_8BITS, > @@ -82,6 +84,7 @@ struct mtk_dpi { > struct pinctrl_state *pins_dpi; > u32 output_fmt; > int refcount; > + struct device *mmsys_dev; > }; > > static inline struct mtk_dpi *bridge_to_dpi(struct drm_bridge *b) > @@ -135,6 +138,7 @@ struct mtk_dpi_yc_limit { > * @yuv422_en_bit: Enable bit of yuv422. > * @csc_enable_bit: Enable bit of CSC. > * @pixels_per_iter: Quantity of transferred pixels per iteration. > + * @edge_cfg_in_mmsys: If the edge configuration for DPI's output > needs to be set in MMSYS. > */ > struct mtk_dpi_conf { > unsigned int (*cal_factor)(int clock); > @@ -153,6 +157,7 @@ struct mtk_dpi_conf { > u32 yuv422_en_bit; > u32 csc_enable_bit; > u32 pixels_per_iter; > + bool edge_cfg_in_mmsys; > }; > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, > u32 mask) > @@ -449,6 +454,9 @@ static void mtk_dpi_dual_edge(struct mtk_dpi > *dpi) > mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, > dpi->output_fmt == > MEDIA_BUS_FMT_RGB888_2X12_LE ? > EDGE_SEL : 0, EDGE_SEL); > + if (dpi->conf->edge_cfg_in_mmsys) > + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, > DPI_RGB888_DDR_CON, > + DPI_FORMAT_MASK); > } else { > mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, > 0); > } > @@ -778,8 +786,10 @@ static int mtk_dpi_bind(struct device *dev, > struct device *master, void *data) > { > struct mtk_dpi *dpi = dev_get_drvdata(dev); > struct drm_device *drm_dev = data; > + struct mtk_drm_private *priv = drm_dev->dev_private; > int ret; > > + dpi->mmsys_dev = priv->mmsys_dev; > ret = drm_simple_encoder_init(drm_dev, &dpi->encoder, > DRM_MODE_ENCODER_TMDS); > if (ret) { > @@ -930,6 +940,24 @@ static const struct mtk_dpi_conf mt8183_conf = { > .csc_enable_bit = CSC_ENABLE, > }; > > +static const struct mtk_dpi_conf mt8186_conf = { > + .cal_factor = mt8183_calculate_factor, > + .reg_h_fre_con = 0xe0, > + .max_clock_khz = 150000, > + .output_fmts = mt8183_output_fmts, > + .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > + .edge_cfg_in_mmsys = true, > + .pixels_per_iter = 1, > + .is_ck_de_pol = true, > + .swap_input_support = true, > + .support_direct_pin = true, > + .dimension_mask = HPW_MASK, > + .hvsize_mask = HSIZE_MASK, > + .channel_swap_shift = CH_SWAP, > + .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > +}; > + > static const struct mtk_dpi_conf mt8192_conf = { > .cal_factor = mt8183_calculate_factor, > .reg_h_fre_con = 0xe0, > @@ -1080,6 +1108,9 @@ static const struct of_device_id > mtk_dpi_of_ids[] = { > { .compatible = "mediatek,mt8183-dpi", > .data = &mt8183_conf, > }, > + { .compatible = "mediatek,mt8186-dpi", > + .data = &mt8186_conf, > + }, > { .compatible = "mediatek,mt8192-dpi", > .data = &mt8192_conf, > }, > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > index 62bd4931b344..779e868ffb1a 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h > @@ -235,4 +235,9 @@ > #define MATRIX_SEL_RGB_TO_JPEG 0 > #define MATRIX_SEL_RGB_TO_BT601 2 > > +/* Values for DPI configuration in MMSYS address space */ > +#define DPI_FORMAT_MASK 0x1 > +#define DPI_RGB888_DDR_CON BIT(0) > +#define DPI_RGB565_SDR_CON BIT(1) This is the mmsys register definition, so move these to mmsys driver. Regards, CK > + > #endif /* __MTK_DPI_REGS_H */ > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > index 5f02f8d0e4fc..28eb1ac91c15 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > @@ -631,6 +631,8 @@ static const struct of_device_id > mtk_ddp_comp_dt_ids[] = { > .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt8183-dpi", > .data = (void *)MTK_DPI }, > + { .compatible = "mediatek,mt8186-dpi", > + .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt8192-dpi", > .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt8195-dp-intf", > -- > 2.18.0 >
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 630a4e301ef6..ffe4a4b70a0f 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -15,6 +15,7 @@ #include <linux/of_graph.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> +#include <linux/soc/mediatek/mtk-mmsys.h> #include <linux/types.h> #include <video/videomode.h> @@ -30,6 +31,7 @@ #include "mtk_disp_drv.h" #include "mtk_dpi_regs.h" #include "mtk_drm_ddp_comp.h" +#include "mtk_drm_drv.h" enum mtk_dpi_out_bit_num { MTK_DPI_OUT_BIT_NUM_8BITS, @@ -82,6 +84,7 @@ struct mtk_dpi { struct pinctrl_state *pins_dpi; u32 output_fmt; int refcount; + struct device *mmsys_dev; }; static inline struct mtk_dpi *bridge_to_dpi(struct drm_bridge *b) @@ -135,6 +138,7 @@ struct mtk_dpi_yc_limit { * @yuv422_en_bit: Enable bit of yuv422. * @csc_enable_bit: Enable bit of CSC. * @pixels_per_iter: Quantity of transferred pixels per iteration. + * @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to be set in MMSYS. */ struct mtk_dpi_conf { unsigned int (*cal_factor)(int clock); @@ -153,6 +157,7 @@ struct mtk_dpi_conf { u32 yuv422_en_bit; u32 csc_enable_bit; u32 pixels_per_iter; + bool edge_cfg_in_mmsys; }; static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) @@ -449,6 +454,9 @@ static void mtk_dpi_dual_edge(struct mtk_dpi *dpi) mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE ? EDGE_SEL : 0, EDGE_SEL); + if (dpi->conf->edge_cfg_in_mmsys) + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, DPI_RGB888_DDR_CON, + DPI_FORMAT_MASK); } else { mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0); } @@ -778,8 +786,10 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data) { struct mtk_dpi *dpi = dev_get_drvdata(dev); struct drm_device *drm_dev = data; + struct mtk_drm_private *priv = drm_dev->dev_private; int ret; + dpi->mmsys_dev = priv->mmsys_dev; ret = drm_simple_encoder_init(drm_dev, &dpi->encoder, DRM_MODE_ENCODER_TMDS); if (ret) { @@ -930,6 +940,24 @@ static const struct mtk_dpi_conf mt8183_conf = { .csc_enable_bit = CSC_ENABLE, }; +static const struct mtk_dpi_conf mt8186_conf = { + .cal_factor = mt8183_calculate_factor, + .reg_h_fre_con = 0xe0, + .max_clock_khz = 150000, + .output_fmts = mt8183_output_fmts, + .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), + .edge_cfg_in_mmsys = true, + .pixels_per_iter = 1, + .is_ck_de_pol = true, + .swap_input_support = true, + .support_direct_pin = true, + .dimension_mask = HPW_MASK, + .hvsize_mask = HSIZE_MASK, + .channel_swap_shift = CH_SWAP, + .yuv422_en_bit = YUV422_EN, + .csc_enable_bit = CSC_ENABLE, +}; + static const struct mtk_dpi_conf mt8192_conf = { .cal_factor = mt8183_calculate_factor, .reg_h_fre_con = 0xe0, @@ -1080,6 +1108,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = { { .compatible = "mediatek,mt8183-dpi", .data = &mt8183_conf, }, + { .compatible = "mediatek,mt8186-dpi", + .data = &mt8186_conf, + }, { .compatible = "mediatek,mt8192-dpi", .data = &mt8192_conf, }, diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h index 62bd4931b344..779e868ffb1a 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h +++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h @@ -235,4 +235,9 @@ #define MATRIX_SEL_RGB_TO_JPEG 0 #define MATRIX_SEL_RGB_TO_BT601 2 +/* Values for DPI configuration in MMSYS address space */ +#define DPI_FORMAT_MASK 0x1 +#define DPI_RGB888_DDR_CON BIT(0) +#define DPI_RGB565_SDR_CON BIT(1) + #endif /* __MTK_DPI_REGS_H */ diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 5f02f8d0e4fc..28eb1ac91c15 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -631,6 +631,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { .data = (void *)MTK_DPI }, { .compatible = "mediatek,mt8183-dpi", .data = (void *)MTK_DPI }, + { .compatible = "mediatek,mt8186-dpi", + .data = (void *)MTK_DPI }, { .compatible = "mediatek,mt8192-dpi", .data = (void *)MTK_DPI }, { .compatible = "mediatek,mt8195-dp-intf",