diff mbox series

[v2,2/2] clk: mediatek: correct cpu clock name for MT8173 SoC

Message ID 20190225065112.3400-2-seiya.wang@mediatek.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/2] arm64: dts: mt8173: correct cpu type of cpu2 and cpu3 to cortex-a72 | expand

Commit Message

Seiya Wang Feb. 25, 2019, 6:51 a.m. UTC 
Correct cpu clock name from ca57 to ca72 since MT8173 does use cortex-a72.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
 drivers/clk/mediatek/clk-mt8173.c      | 4 ++--
 include/dt-bindings/clock/mt8173-clk.h | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

Comments

Stephen Boyd Feb. 26, 2019, 6:17 p.m. UTC | #1 
Quoting Seiya Wang (2019-02-24 22:51:12)
> Correct cpu clock name from ca57 to ca72 since MT8173 does use cortex-a72.
> 
> Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> Acked-by: Stephen Boyd <sboyd@kernel.org>
> ---

Applied to clk-next
Stephen Boyd Feb. 26, 2019, 6:18 p.m. UTC | #2 
Quoting Seiya Wang (2019-02-24 22:51:12)
> diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
> index 8aea623dd518..76e4e5b65353 100644
> --- a/include/dt-bindings/clock/mt8173-clk.h
> +++ b/include/dt-bindings/clock/mt8173-clk.h
> @@ -194,7 +194,8 @@
>  #define CLK_INFRA_PMICWRAP             11
>  #define CLK_INFRA_CLK_13M              12
>  #define CLK_INFRA_CA53SEL               13
> -#define CLK_INFRA_CA57SEL               14
> +#define CLK_INFRA_CA57SEL               14 /* Deprecated. Don't use it. */
> +#define CLK_INFRA_CA72SEL               14

Also, please send a followup patch to remove the deprecated define later
when the dts file is fixed up.
Seiya Wang Feb. 28, 2019, 2:03 a.m. UTC | #3 
On Tue, 2019-02-26 at 10:18 -0800, Stephen Boyd wrote:
> Quoting Seiya Wang (2019-02-24 22:51:12)
> > diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
> > index 8aea623dd518..76e4e5b65353 100644
> > --- a/include/dt-bindings/clock/mt8173-clk.h
> > +++ b/include/dt-bindings/clock/mt8173-clk.h
> > @@ -194,7 +194,8 @@
> >  #define CLK_INFRA_PMICWRAP             11
> >  #define CLK_INFRA_CLK_13M              12
> >  #define CLK_INFRA_CA53SEL               13
> > -#define CLK_INFRA_CA57SEL               14
> > +#define CLK_INFRA_CA57SEL               14 /* Deprecated. Don't use it. */
> > +#define CLK_INFRA_CA72SEL               14
> 
> Also, please send a followup patch to remove the deprecated define later
> when the dts file is fixed up.
> 

Sure. Thank you so much~
diff mbox series

Patch

diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
index 96c292c3e440..deedeb3ea33b 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -533,7 +533,7 @@  static const char * const ca53_parents[] __initconst = {
 	"univpll"
 };
 
-static const char * const ca57_parents[] __initconst = {
+static const char * const ca72_parents[] __initconst = {
 	"clk26m",
 	"armca15pll",
 	"mainpll",
@@ -542,7 +542,7 @@  static const char * const ca57_parents[] __initconst = {
 
 static const struct mtk_composite cpu_muxes[] __initconst = {
 	MUX(CLK_INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
-	MUX(CLK_INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
+	MUX(CLK_INFRA_CA72SEL, "infra_ca72_sel", ca72_parents, 0x0000, 2, 2),
 };
 
 static const struct mtk_composite top_muxes[] __initconst = {
diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h
index 8aea623dd518..76e4e5b65353 100644
--- a/include/dt-bindings/clock/mt8173-clk.h
+++ b/include/dt-bindings/clock/mt8173-clk.h
@@ -194,7 +194,8 @@ 
 #define CLK_INFRA_PMICWRAP		11
 #define CLK_INFRA_CLK_13M		12
 #define CLK_INFRA_CA53SEL               13
-#define CLK_INFRA_CA57SEL               14
+#define CLK_INFRA_CA57SEL               14 /* Deprecated. Don't use it. */
+#define CLK_INFRA_CA72SEL               14
 #define CLK_INFRA_NR_CLK                15
 
 /* PERI_SYS */