From patchwork Fri Sep 6 10:05:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 11134889 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4A1271395 for ; Fri, 6 Sep 2019 10:06:59 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 253672082C for ; Fri, 6 Sep 2019 10:06:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="SwQhXGcb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 253672082C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Bq85L4K/kOv3ZXtDRbVMswEpQ+Fo44YXzGSmyfVdV/Q=; b=SwQhXGcbyKX7Sv 2iYCRUOzCARibuCSLkJ7V7tNk6hQMvQeqO46gKczbuPVFseIPObNjgq9itMqcLf5iF9GyjZdxyP3l VlavaSTQVmRHyaOAQeOmCvsG/Oy7gNhV6VZQi6gQ6H7rHZ2pptHMUocivFmuqmNrXA7jtOHmsN14T H3OztMVILwWHOs8blf1ddiXHwizXdoYPHXSOEsj2xPuPaUl8ssyyPWtm63FS7FRnFZ4h2B05sTR52 adtCgffOgp9xSZ/z9/ecdsjJw2XKUhXdc/i0x5iAO9kYTCJkY4KBqG5ajmXy6I4dDFjXRbqKUXJHa MfutC2TTxUHTH3b6ak+g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i6B8s-0002Qz-HS; Fri, 06 Sep 2019 10:06:58 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1i6B7m-0001Ws-GZ; Fri, 06 Sep 2019 10:05:52 +0000 X-UUID: cbe1168c6bc84d9e9e880dc9657f2184-20190906 X-UUID: cbe1168c6bc84d9e9e880dc9657f2184-20190906 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1640664627; Fri, 06 Sep 2019 02:05:46 -0800 Received: from MTKMBS01N2.mediatek.inc (172.21.101.79) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 6 Sep 2019 03:05:44 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 6 Sep 2019 18:05:38 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 6 Sep 2019 18:05:36 +0800 From: Roger Lu To: Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd Subject: [PATCH v5 2/3] arm64: dts: mt8183: add svs device information Date: Fri, 6 Sep 2019 18:05:14 +0800 Message-ID: <20190906100514.30803-3-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190906100514.30803-1-roger.lu@mediatek.com> References: <20190906100514.30803-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 9FBA1D41D325C9551F47247846E57E9AC6F34033007F8A5A4C42B98883029E182000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190906_030550_697958_4738AE70 X-CRM114-Status: UNSURE ( 9.61 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Nishanth Menon , Angus Lin , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Roger Lu , linux-kernel@vger.kernel.org, HenryC Chen , yt.lee@mediatek.com, Fan Chen , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org Add pmic/clock/irq/efuse setting in svs noce Signed-off-by: Roger Lu --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 16 +++++++++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 38 +++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index d8e555cbb5d3..7c1d6e6a2a85 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -135,6 +135,22 @@ }; +&svs_cpu_little { + vcpu-little-supply = <&mt6358_vproc12_reg>; +}; + +&svs_cpu_big { + vcpu-big-supply = <&mt6358_vproc11_reg>; +}; + +&svs_cci { + vcci-supply = <&mt6358_vproc12_reg>; +}; + +&svs_gpu { + vgpu-spply = <&mt6358_vgpu_reg>; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 66aaa07f6cec..48343328bec2 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -351,6 +351,39 @@ status = "disabled"; }; + svs: svs@1100b000 { + compatible = "mediatek,mt8183-svs"; + reg = <0 0x1100b000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_THERM>; + clock-names = "main_clk"; + nvmem-cells = <&svs_calibration>, + <&thermal_calibration>; + nvmem-cell-names = "svs-calibration-data", + "calibration-data"; + + svs_cpu_little: svs_cpu_little { + compatible = "mediatek,mt8183-svs-cpu-little"; + operating-points-v2 = <&cluster0_opp>; + }; + + svs_cpu_big: svs_cpu_big { + compatible = "mediatek,mt8183-svs-cpu-big"; + operating-points-v2 = <&cluster1_opp>; + }; + + svs_cci: svs_cci { + compatible = "mediatek,mt8183-svs-cci"; + operating-points-v2 = <&cci_opp>; + }; + + svs_gpu: svs_gpu { + compatible = "mediatek,mt8183-svs-gpu"; + power-domains = <&scpsys MT8183_POWER_DOMAIN_MFG_2D>; + operating-points-v2 = <&gpu_opp_table>; + }; + }; + spi0: spi@1100a000 { compatible = "mediatek,mt8183-spi"; #address-cells = <1>; @@ -439,6 +472,11 @@ compatible = "mediatek,mt8183-efuse", "mediatek,efuse"; reg = <0 0x11f10000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + svs_calibration: calib@580 { + reg = <0x580 0x64>; + }; }; mfgcfg: syscon@13000000 {