From patchwork Mon Aug 17 02:48:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Crystal Guo X-Patchwork-Id: 11716303 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 25E8F109B for ; Mon, 17 Aug 2020 02:50:38 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F3B4320658 for ; Mon, 17 Aug 2020 02:50:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="g6G50rel"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="JLxLRJ1I" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F3B4320658 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=REGmAzWGrW3NsQQQ3Vm1w4EASI3Wpj69y7igGbNxL5s=; b=g6G50relewLu9YVOhQ9yvqJDT 5q4GCtNytPIZMEuoF5FuTVqx5uhFDDS8W1b4ppBT2C4oJwscjJaV/myBnZSgXUn/FqWTKHr+tgF9g bv/fOaM5tSrQPpfKxGPhNe6kWmMit15he9aeYCNTImUTkZhhIJeGA14D44Dc3Hg4AC2O+Cj21fN1b gjzIySnf2G8/+T8vL9YXBinkGBsLWnjswFEhWifivGVN+vRnhgNUWSOOcJirU2QYRJgBkcF0QEXL7 0hnZz+rk3qudbd/+ed6nUPDuWH1QPU9qGX/juwDeH8kpEESstrIWS1n0a6jPk5cS0n65cAvG+9KcE /JcMDCdyg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k7VEI-0004On-Mw; Mon, 17 Aug 2020 02:50:34 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k7VE9-0004MG-2o; Mon, 17 Aug 2020 02:50:27 +0000 X-UUID: 8f3658c561c34637a810e23d96898ea5-20200816 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=keeKoJIRKUWFE6P/EASXouOcJ/N4TDpUj5yGA3TaFgs=; b=JLxLRJ1I4279hHgA4aVe2HMhLsaWkykIAV7aMnLd9Kh3y/XkhYSIDeU75RS3Burmsk9Bs6ityN5D58CWEfJKNLnAmYoslMdmYe8D7svs18hofMbi6Sv4sSGTmFhdjmoTDYgDXB1pm6cR3PDJWrYDZRQhX14Y/O8KYF09X9Nj5tM=; X-UUID: 8f3658c561c34637a810e23d96898ea5-20200816 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 2085031841; Sun, 16 Aug 2020 18:50:22 -0800 Received: from MTKMBS02N1.mediatek.inc (172.21.101.77) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 16 Aug 2020 19:50:20 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 17 Aug 2020 10:50:12 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 17 Aug 2020 10:50:12 +0800 From: Crystal Guo To: , , Subject: [v3,3/4] reset-controller: ti: introduce a new reset handler Date: Mon, 17 Aug 2020 10:48:41 +0800 Message-ID: <20200817024842.5289-4-crystal.guo@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200817024842.5289-1-crystal.guo@mediatek.com> References: <20200817024842.5289-1-crystal.guo@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200816_225025_282554_2AB7FE20 X-CRM114-Status: GOOD ( 14.75 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, yong.liang@mediatek.com, stanley.chu@mediatek.com, srv_heupstream@mediatek.com, seiya.wang@mediatek.com, linux-kernel@vger.kernel.org, afd@ti.com, fan.chen@mediatek.com, Crystal Guo , linux-mediatek@lists.infradead.org, yingjoe.chen@mediatek.com, s-anna@ti.com, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org Introduce ti_syscon_reset() to integrate assert and deassert together. If some modules need do serialized assert and deassert operations to reset itself, reset_control_reset can be called for convenience. Such as reset-qcom-aoss.c, it integrates assert and deassert together by 'reset' method. MTK Socs also need this method to perform reset. Signed-off-by: Crystal Guo --- drivers/reset/reset-ti-syscon.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c index a2635c21db7f..08289342f9af 100644 --- a/drivers/reset/reset-ti-syscon.c +++ b/drivers/reset/reset-ti-syscon.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -56,6 +57,7 @@ struct ti_syscon_reset_data { struct regmap *regmap; struct ti_syscon_reset_control *controls; unsigned int nr_controls; + unsigned int reset_duration_us; }; #define to_ti_syscon_reset_data(rcdev) \ @@ -89,7 +91,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, mask = BIT(control->assert_bit); value = (control->flags & ASSERT_SET) ? mask : 0x0; - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); } /** @@ -120,7 +122,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, mask = BIT(control->deassert_bit); value = (control->flags & DEASSERT_SET) ? mask : 0x0; - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); } /** @@ -158,9 +160,26 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, !(control->flags & STATUS_SET); } +static int ti_syscon_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); + int ret; + + ret = ti_syscon_reset_assert(rcdev, id); + if (ret) + return ret; + + if (data->reset_duration_us) + usleep_range(data->reset_duration_us, data->reset_duration_us * 2); + + return ti_syscon_reset_deassert(rcdev, id); +} + static const struct reset_control_ops ti_syscon_reset_ops = { .assert = ti_syscon_reset_assert, .deassert = ti_syscon_reset_deassert, + .reset = ti_syscon_reset, .status = ti_syscon_reset_status, }; @@ -204,6 +223,9 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) controls[i].flags = be32_to_cpup(list++); } + of_property_read_u32(pdev->dev.of_node, "reset-duration-us", + &data->reset_duration_us); + data->rcdev.ops = &ti_syscon_reset_ops; data->rcdev.owner = THIS_MODULE; data->rcdev.of_node = np;