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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id y1sm9488269wru.87.2020.09.10.06.01.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Sep 2020 06:01:37 -0700 (PDT) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, matthias.bgg@gmail.com, mathieu.poirier@linaro.org Subject: [PATCH v2 1/4] dt bindings: remoteproc: Add bindings for MT8183 APU Date: Thu, 10 Sep 2020 15:01:45 +0200 Message-Id: <20200910130148.8734-2-abailon@baylibre.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200910130148.8734-1-abailon@baylibre.com> References: <20200910130148.8734-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200910_090141_041647_12209A7C X-CRM114-Status: GOOD ( 14.99 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:444 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, stephane.leprovost@mediatek.com, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, gpain@baylibre.com, linux-mediatek@lists.infradead.org, Alexandre Bailon , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org This adds dt bindings for the APU present in the MT8183. Signed-off-by: Alexandre Bailon Reviewed-by: Rob Herring --- .../bindings/remoteproc/mtk,apu.yaml | 107 ++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml new file mode 100644 index 000000000000..7a71d2f5c4e6 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 + +--- +$id: "http://devicetree.org/schemas/remoteproc/mtk,apu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MT8183 AI Processor Unit (APU) a.k.a. Vision Processor Unit (VPU) + +description: + This document defines the binding for the APU, a co-processor that could + offload the CPU for machine learning and neural network. + +maintainers: + - Alexandre Bailon + +properties: + compatible: + const: mediatek,mt8183-apu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: + Three clocks are expected for AXI, IPU and JTAG. + The JTAG clock seems to be required to run the DSP, + even when JTAG is not in use." + maxItems: 3 + + clock-names: + items: + - const: axi + - const: ipu + - const: jtag + + iommus: + maxItems: 3 + + memory-region: + maxItems: 1 + + power-domains: + maxItems: 1 + + pinctrl: + description: pinctrl handles, required to configure pins for JTAG. + + pinctrl-names: + items: + - const: jtag + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - iommus + - memory-region + - power-domains + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + apu_ram: apu_ram@0x60000000 { + compatible = "shared-dma-pool"; + reg = <0x60000000 0x040000000>; + no-map; + linux,cma-default; + }; + }; + + apu0: apu@19100000 { + compatible = "mediatek,mt8183-apu"; + reg = <0x19180000 0x14000>; + interrupts = ; + + iommus = <&iommu M4U_PORT_IMG_IPUO>, + <&iommu M4U_PORT_IMG_IPU3O>, + <&iommu M4U_PORT_IMG_IPUI>; + + clocks = <&ipu_core0 CLK_IPU_CORE0_AXI>, + <&ipu_core0 CLK_IPU_CORE0_IPU>, + <&ipu_core0 CLK_IPU_CORE0_JTAG>; + + clock-names = "axi", "ipu", "jtag"; + + power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE0>; + memory-region = <&apu_ram>; + }; +...