@@ -52,6 +52,7 @@ struct mtk_drm_crtc {
struct mbox_client cmdq_cl;
struct mbox_chan *cmdq_chan;
u32 cmdq_event;
+ u32 cmdq_vblank_cnt;
#endif
struct device *mmsys_dev;
@@ -244,6 +245,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg)
struct mtk_drm_crtc *mtk_crtc = container_of(cl, struct mtk_drm_crtc, cmdq_cl);
struct cmdq_cb_data *data = mssg;
+ mtk_crtc->cmdq_vblank_cnt = 0;
cmdq_pkt_destroy(mtk_crtc->cmdq_chan, data->pkt);
}
#endif
@@ -494,6 +496,11 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc)
cmdq_handle->pa_base,
cmdq_handle->cmd_buf_size,
DMA_TO_DEVICE);
+ /*
+ * CMDQ command should execute in next vblank,
+ * If it fail to execute in next 2 vblank, timeout happen.
+ */
+ mtk_crtc->cmdq_vblank_cnt = 2;
cmdq_pkt_flush_async(mtk_crtc->cmdq_chan, cmdq_handle);
}
#endif
@@ -674,10 +681,14 @@ void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *comp)
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (!priv->data->shadow_register && !mtk_crtc->cmdq_chan)
+ mtk_crtc_ddp_config(crtc, NULL);
+ else if (mtk_crtc->cmdq_vblank_cnt && --mtk_crtc->cmdq_vblank_cnt == 0)
+ DRM_ERROR("mtk_crtc %d CMDQ execute command timeout!\n",
+ drm_crtc_index(&mtk_crtc->base));
#else
if (!priv->data->shadow_register)
-#endif
mtk_crtc_ddp_config(crtc, NULL);
+#endif
mtk_drm_finish_page_flip(mtk_crtc);
}
CMDQ is used to update display register in vblank period, so it should be execute in next vblank. If it fail to execute in next 2 vblank, tiemout happen. Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)