| Message ID | 20210129092209.2584718-8-hsinyi@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/mediatek: add support for mediatek SOC MT8183 | expand |
Hi Hsin-Yi, Thank you for your patch. Missatge de Hsin-Yi Wang <hsinyi@chromium.org> del dia dv., 29 de gen. 2021 a les 10:23: > > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > Add mtk mutex support for MT8183 SoC. > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> FWIW this patch is required to have the display working on the Chromebook IdeaPad Duet, so Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Matthias, If I am not wrong, this patch is the only one that is not applied for this series. I know that is too late for 5.12, but If you're fine with it, could you pick this patch directly or do you prefer a resend of this patch alone once you will start to accept patches for the next release? Thanks, Enric > --- > drivers/soc/mediatek/mtk-mutex.c | 50 ++++++++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c > index f531b119da7a9..718a41beb6afb 100644 > --- a/drivers/soc/mediatek/mtk-mutex.c > +++ b/drivers/soc/mediatek/mtk-mutex.c > @@ -14,6 +14,8 @@ > > #define MT2701_MUTEX0_MOD0 0x2c > #define MT2701_MUTEX0_SOF0 0x30 > +#define MT8183_MUTEX0_MOD0 0x30 > +#define MT8183_MUTEX0_SOF0 0x2c > > #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) > #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) > @@ -37,6 +39,18 @@ > #define MT8167_MUTEX_MOD_DISP_DITHER 15 > #define MT8167_MUTEX_MOD_DISP_UFOE 16 > > +#define MT8183_MUTEX_MOD_DISP_RDMA0 0 > +#define MT8183_MUTEX_MOD_DISP_RDMA1 1 > +#define MT8183_MUTEX_MOD_DISP_OVL0 9 > +#define MT8183_MUTEX_MOD_DISP_OVL0_2L 10 > +#define MT8183_MUTEX_MOD_DISP_OVL1_2L 11 > +#define MT8183_MUTEX_MOD_DISP_WDMA0 12 > +#define MT8183_MUTEX_MOD_DISP_COLOR0 13 > +#define MT8183_MUTEX_MOD_DISP_CCORR0 14 > +#define MT8183_MUTEX_MOD_DISP_AAL0 15 > +#define MT8183_MUTEX_MOD_DISP_GAMMA0 16 > +#define MT8183_MUTEX_MOD_DISP_DITHER0 17 > + > #define MT8173_MUTEX_MOD_DISP_OVL0 11 > #define MT8173_MUTEX_MOD_DISP_OVL1 12 > #define MT8173_MUTEX_MOD_DISP_RDMA0 13 > @@ -87,6 +101,11 @@ > #define MT2712_MUTEX_SOF_DSI3 6 > #define MT8167_MUTEX_SOF_DPI0 2 > #define MT8167_MUTEX_SOF_DPI1 3 > +#define MT8183_MUTEX_SOF_DSI0 1 > +#define MT8183_MUTEX_SOF_DPI0 2 > + > +#define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_SOF_DSI0 << 6) > +#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6) > > struct mtk_mutex { > int id; > @@ -181,6 +200,20 @@ static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] = { > [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, > }; > > +static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { > + [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0, > + [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0, > + [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0, > + [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0, > + [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0, > + [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0, > + [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L, > + [DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L, > + [DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0, > + [DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1, > + [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0, > +}; > + > static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = { > [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, > [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0, > @@ -198,6 +231,13 @@ static const unsigned int mt8167_mutex_sof[MUTEX_SOF_DSI3 + 1] = { > [MUTEX_SOF_DPI1] = MT8167_MUTEX_SOF_DPI1, > }; > > +/* Add EOF setting so overlay hardware can receive frame done irq */ > +static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = { > + [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, > + [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0 | MT8183_MUTEX_EOF_DSI0, > + [MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0, > +}; > + > static const struct mtk_mutex_data mt2701_mutex_driver_data = { > .mutex_mod = mt2701_mutex_mod, > .mutex_sof = mt2712_mutex_sof, > @@ -227,6 +267,14 @@ static const struct mtk_mutex_data mt8173_mutex_driver_data = { > .mutex_sof_reg = MT2701_MUTEX0_SOF0, > }; > > +static const struct mtk_mutex_data mt8183_mutex_driver_data = { > + .mutex_mod = mt8183_mutex_mod, > + .mutex_sof = mt8183_mutex_sof, > + .mutex_mod_reg = MT8183_MUTEX0_MOD0, > + .mutex_sof_reg = MT8183_MUTEX0_SOF0, > + .no_clk = true, > +}; > + > struct mtk_mutex *mtk_mutex_get(struct device *dev) > { > struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev); > @@ -457,6 +505,8 @@ static const struct of_device_id mutex_driver_dt_match[] = { > .data = &mt8167_mutex_driver_data}, > { .compatible = "mediatek,mt8173-disp-mutex", > .data = &mt8173_mutex_driver_data}, > + { .compatible = "mediatek,mt8183-disp-mutex", > + .data = &mt8183_mutex_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mutex_driver_dt_match); > -- > 2.30.0.365.g02bc693789-goog > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
On 09/02/2021 15:48, Enric Balletbo Serra wrote: > Hi Hsin-Yi, > > Thank you for your patch. > > Missatge de Hsin-Yi Wang <hsinyi@chromium.org> del dia dv., 29 de gen. > 2021 a les 10:23: >> >> From: Yongqiang Niu <yongqiang.niu@mediatek.com> >> >> Add mtk mutex support for MT8183 SoC. >> >> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> >> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> >> Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> > > FWIW this patch is required to have the display working on the > Chromebook IdeaPad Duet, so > > Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> > > Matthias, If I am not wrong, this patch is the only one that is not > applied for this series. I know that is too late for 5.12, but If > you're fine with it, could you pick this patch directly or do you > prefer a resend of this patch alone once you will start to accept > patches for the next release? This patch is based on top of a patch that's in CK's branch. Let's wait for v5.12-rc1 then I'll take it. If I forget just ping me here/IRC Regards, Matthias > > Thanks, > Enric > >> --- >> drivers/soc/mediatek/mtk-mutex.c | 50 ++++++++++++++++++++++++++++++++ >> 1 file changed, 50 insertions(+) >> >> diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c >> index f531b119da7a9..718a41beb6afb 100644 >> --- a/drivers/soc/mediatek/mtk-mutex.c >> +++ b/drivers/soc/mediatek/mtk-mutex.c >> @@ -14,6 +14,8 @@ >> >> #define MT2701_MUTEX0_MOD0 0x2c >> #define MT2701_MUTEX0_SOF0 0x30 >> +#define MT8183_MUTEX0_MOD0 0x30 >> +#define MT8183_MUTEX0_SOF0 0x2c >> >> #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) >> #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) >> @@ -37,6 +39,18 @@ >> #define MT8167_MUTEX_MOD_DISP_DITHER 15 >> #define MT8167_MUTEX_MOD_DISP_UFOE 16 >> >> +#define MT8183_MUTEX_MOD_DISP_RDMA0 0 >> +#define MT8183_MUTEX_MOD_DISP_RDMA1 1 >> +#define MT8183_MUTEX_MOD_DISP_OVL0 9 >> +#define MT8183_MUTEX_MOD_DISP_OVL0_2L 10 >> +#define MT8183_MUTEX_MOD_DISP_OVL1_2L 11 >> +#define MT8183_MUTEX_MOD_DISP_WDMA0 12 >> +#define MT8183_MUTEX_MOD_DISP_COLOR0 13 >> +#define MT8183_MUTEX_MOD_DISP_CCORR0 14 >> +#define MT8183_MUTEX_MOD_DISP_AAL0 15 >> +#define MT8183_MUTEX_MOD_DISP_GAMMA0 16 >> +#define MT8183_MUTEX_MOD_DISP_DITHER0 17 >> + >> #define MT8173_MUTEX_MOD_DISP_OVL0 11 >> #define MT8173_MUTEX_MOD_DISP_OVL1 12 >> #define MT8173_MUTEX_MOD_DISP_RDMA0 13 >> @@ -87,6 +101,11 @@ >> #define MT2712_MUTEX_SOF_DSI3 6 >> #define MT8167_MUTEX_SOF_DPI0 2 >> #define MT8167_MUTEX_SOF_DPI1 3 >> +#define MT8183_MUTEX_SOF_DSI0 1 >> +#define MT8183_MUTEX_SOF_DPI0 2 >> + >> +#define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_SOF_DSI0 << 6) >> +#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6) >> >> struct mtk_mutex { >> int id; >> @@ -181,6 +200,20 @@ static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] = { >> [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, >> }; >> >> +static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { >> + [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0, >> + [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0, >> + [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0, >> + [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0, >> + [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0, >> + [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0, >> + [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L, >> + [DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L, >> + [DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0, >> + [DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1, >> + [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0, >> +}; >> + >> static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = { >> [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, >> [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0, >> @@ -198,6 +231,13 @@ static const unsigned int mt8167_mutex_sof[MUTEX_SOF_DSI3 + 1] = { >> [MUTEX_SOF_DPI1] = MT8167_MUTEX_SOF_DPI1, >> }; >> >> +/* Add EOF setting so overlay hardware can receive frame done irq */ >> +static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = { >> + [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, >> + [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0 | MT8183_MUTEX_EOF_DSI0, >> + [MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0, >> +}; >> + >> static const struct mtk_mutex_data mt2701_mutex_driver_data = { >> .mutex_mod = mt2701_mutex_mod, >> .mutex_sof = mt2712_mutex_sof, >> @@ -227,6 +267,14 @@ static const struct mtk_mutex_data mt8173_mutex_driver_data = { >> .mutex_sof_reg = MT2701_MUTEX0_SOF0, >> }; >> >> +static const struct mtk_mutex_data mt8183_mutex_driver_data = { >> + .mutex_mod = mt8183_mutex_mod, >> + .mutex_sof = mt8183_mutex_sof, >> + .mutex_mod_reg = MT8183_MUTEX0_MOD0, >> + .mutex_sof_reg = MT8183_MUTEX0_SOF0, >> + .no_clk = true, >> +}; >> + >> struct mtk_mutex *mtk_mutex_get(struct device *dev) >> { >> struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev); >> @@ -457,6 +505,8 @@ static const struct of_device_id mutex_driver_dt_match[] = { >> .data = &mt8167_mutex_driver_data}, >> { .compatible = "mediatek,mt8173-disp-mutex", >> .data = &mt8173_mutex_driver_data}, >> + { .compatible = "mediatek,mt8183-disp-mutex", >> + .data = &mt8183_mutex_driver_data}, >> {}, >> }; >> MODULE_DEVICE_TABLE(of, mutex_driver_dt_match); >> -- >> 2.30.0.365.g02bc693789-goog >> >> >> _______________________________________________ >> Linux-mediatek mailing list >> Linux-mediatek@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-mediatek
On 29/01/2021 10:22, Hsin-Yi Wang wrote: > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > Add mtk mutex support for MT8183 SoC. > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> > Reviewed-by: CK Hu <ck.hu@mediatek.com> > --- > drivers/soc/mediatek/mtk-mutex.c | 50 ++++++++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > Applied to v5.12-next/soc Thanks > diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c > index f531b119da7a9..718a41beb6afb 100644 > --- a/drivers/soc/mediatek/mtk-mutex.c > +++ b/drivers/soc/mediatek/mtk-mutex.c > @@ -14,6 +14,8 @@ > > #define MT2701_MUTEX0_MOD0 0x2c > #define MT2701_MUTEX0_SOF0 0x30 > +#define MT8183_MUTEX0_MOD0 0x30 > +#define MT8183_MUTEX0_SOF0 0x2c > > #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) > #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) > @@ -37,6 +39,18 @@ > #define MT8167_MUTEX_MOD_DISP_DITHER 15 > #define MT8167_MUTEX_MOD_DISP_UFOE 16 > > +#define MT8183_MUTEX_MOD_DISP_RDMA0 0 > +#define MT8183_MUTEX_MOD_DISP_RDMA1 1 > +#define MT8183_MUTEX_MOD_DISP_OVL0 9 > +#define MT8183_MUTEX_MOD_DISP_OVL0_2L 10 > +#define MT8183_MUTEX_MOD_DISP_OVL1_2L 11 > +#define MT8183_MUTEX_MOD_DISP_WDMA0 12 > +#define MT8183_MUTEX_MOD_DISP_COLOR0 13 > +#define MT8183_MUTEX_MOD_DISP_CCORR0 14 > +#define MT8183_MUTEX_MOD_DISP_AAL0 15 > +#define MT8183_MUTEX_MOD_DISP_GAMMA0 16 > +#define MT8183_MUTEX_MOD_DISP_DITHER0 17 > + > #define MT8173_MUTEX_MOD_DISP_OVL0 11 > #define MT8173_MUTEX_MOD_DISP_OVL1 12 > #define MT8173_MUTEX_MOD_DISP_RDMA0 13 > @@ -87,6 +101,11 @@ > #define MT2712_MUTEX_SOF_DSI3 6 > #define MT8167_MUTEX_SOF_DPI0 2 > #define MT8167_MUTEX_SOF_DPI1 3 > +#define MT8183_MUTEX_SOF_DSI0 1 > +#define MT8183_MUTEX_SOF_DPI0 2 > + > +#define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_SOF_DSI0 << 6) > +#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6) > > struct mtk_mutex { > int id; > @@ -181,6 +200,20 @@ static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] = { > [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, > }; > > +static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { > + [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0, > + [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0, > + [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0, > + [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0, > + [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0, > + [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0, > + [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L, > + [DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L, > + [DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0, > + [DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1, > + [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0, > +}; > + > static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = { > [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, > [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0, > @@ -198,6 +231,13 @@ static const unsigned int mt8167_mutex_sof[MUTEX_SOF_DSI3 + 1] = { > [MUTEX_SOF_DPI1] = MT8167_MUTEX_SOF_DPI1, > }; > > +/* Add EOF setting so overlay hardware can receive frame done irq */ > +static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = { > + [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, > + [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0 | MT8183_MUTEX_EOF_DSI0, > + [MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0, > +}; > + > static const struct mtk_mutex_data mt2701_mutex_driver_data = { > .mutex_mod = mt2701_mutex_mod, > .mutex_sof = mt2712_mutex_sof, > @@ -227,6 +267,14 @@ static const struct mtk_mutex_data mt8173_mutex_driver_data = { > .mutex_sof_reg = MT2701_MUTEX0_SOF0, > }; > > +static const struct mtk_mutex_data mt8183_mutex_driver_data = { > + .mutex_mod = mt8183_mutex_mod, > + .mutex_sof = mt8183_mutex_sof, > + .mutex_mod_reg = MT8183_MUTEX0_MOD0, > + .mutex_sof_reg = MT8183_MUTEX0_SOF0, > + .no_clk = true, > +}; > + > struct mtk_mutex *mtk_mutex_get(struct device *dev) > { > struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev); > @@ -457,6 +505,8 @@ static const struct of_device_id mutex_driver_dt_match[] = { > .data = &mt8167_mutex_driver_data}, > { .compatible = "mediatek,mt8173-disp-mutex", > .data = &mt8173_mutex_driver_data}, > + { .compatible = "mediatek,mt8183-disp-mutex", > + .data = &mt8183_mutex_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mutex_driver_dt_match); >
diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index f531b119da7a9..718a41beb6afb 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -14,6 +14,8 @@ #define MT2701_MUTEX0_MOD0 0x2c #define MT2701_MUTEX0_SOF0 0x30 +#define MT8183_MUTEX0_MOD0 0x30 +#define MT8183_MUTEX0_SOF0 0x2c #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) @@ -37,6 +39,18 @@ #define MT8167_MUTEX_MOD_DISP_DITHER 15 #define MT8167_MUTEX_MOD_DISP_UFOE 16 +#define MT8183_MUTEX_MOD_DISP_RDMA0 0 +#define MT8183_MUTEX_MOD_DISP_RDMA1 1 +#define MT8183_MUTEX_MOD_DISP_OVL0 9 +#define MT8183_MUTEX_MOD_DISP_OVL0_2L 10 +#define MT8183_MUTEX_MOD_DISP_OVL1_2L 11 +#define MT8183_MUTEX_MOD_DISP_WDMA0 12 +#define MT8183_MUTEX_MOD_DISP_COLOR0 13 +#define MT8183_MUTEX_MOD_DISP_CCORR0 14 +#define MT8183_MUTEX_MOD_DISP_AAL0 15 +#define MT8183_MUTEX_MOD_DISP_GAMMA0 16 +#define MT8183_MUTEX_MOD_DISP_DITHER0 17 + #define MT8173_MUTEX_MOD_DISP_OVL0 11 #define MT8173_MUTEX_MOD_DISP_OVL1 12 #define MT8173_MUTEX_MOD_DISP_RDMA0 13 @@ -87,6 +101,11 @@ #define MT2712_MUTEX_SOF_DSI3 6 #define MT8167_MUTEX_SOF_DPI0 2 #define MT8167_MUTEX_SOF_DPI1 3 +#define MT8183_MUTEX_SOF_DSI0 1 +#define MT8183_MUTEX_SOF_DPI0 2 + +#define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_SOF_DSI0 << 6) +#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6) struct mtk_mutex { int id; @@ -181,6 +200,20 @@ static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, }; +static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { + [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0, + [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0, + [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0, + [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0, + [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0, + [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0, + [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L, + [DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L, + [DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0, + [DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1, + [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0, +}; + static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = { [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0, @@ -198,6 +231,13 @@ static const unsigned int mt8167_mutex_sof[MUTEX_SOF_DSI3 + 1] = { [MUTEX_SOF_DPI1] = MT8167_MUTEX_SOF_DPI1, }; +/* Add EOF setting so overlay hardware can receive frame done irq */ +static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = { + [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0 | MT8183_MUTEX_EOF_DSI0, + [MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0, +}; + static const struct mtk_mutex_data mt2701_mutex_driver_data = { .mutex_mod = mt2701_mutex_mod, .mutex_sof = mt2712_mutex_sof, @@ -227,6 +267,14 @@ static const struct mtk_mutex_data mt8173_mutex_driver_data = { .mutex_sof_reg = MT2701_MUTEX0_SOF0, }; +static const struct mtk_mutex_data mt8183_mutex_driver_data = { + .mutex_mod = mt8183_mutex_mod, + .mutex_sof = mt8183_mutex_sof, + .mutex_mod_reg = MT8183_MUTEX0_MOD0, + .mutex_sof_reg = MT8183_MUTEX0_SOF0, + .no_clk = true, +}; + struct mtk_mutex *mtk_mutex_get(struct device *dev) { struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev); @@ -457,6 +505,8 @@ static const struct of_device_id mutex_driver_dt_match[] = { .data = &mt8167_mutex_driver_data}, { .compatible = "mediatek,mt8173-disp-mutex", .data = &mt8173_mutex_driver_data}, + { .compatible = "mediatek,mt8183-disp-mutex", + .data = &mt8183_mutex_driver_data}, {}, }; MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);