| Message ID | 20210201110447.383473-1-hsinyi@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: mediatek: Add gce client reg for display subcomponents | expand |
Hi Hsin-Yi, Thank you for the patch. Missatge de Hsin-Yi Wang <hsinyi@chromium.org> del dia dl., 1 de febr. 2021 a les 12:05: > > Add mediatek,gce-client-reg for ccorr, aal, gamma, dither. > > Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> FWIW this removes some errors from the boot log like this: platform 14010000.aal: error -2 can't parse gce-client-reg property (0) Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index b3b8afec5ab9a..0ed37dd9d80b4 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -1058,6 +1058,7 @@ ccorr0: ccorr@1400f000 { > interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>; > power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_CCORR0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; > }; > > aal0: aal@14010000 { > @@ -1067,6 +1068,7 @@ aal0: aal@14010000 { > interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_LOW>; > power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_AAL0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>; > }; > > gamma0: gamma@14011000 { > @@ -1075,6 +1077,7 @@ gamma0: gamma@14011000 { > interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_LOW>; > power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_GAMMA0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; > }; > > dither0: dither@14012000 { > @@ -1083,6 +1086,7 @@ dither0: dither@14012000 { > interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>; > power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_DITHER0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; > }; > > dsi0: dsi@14014000 { > -- > 2.30.0.365.g02bc693789-goog > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index b3b8afec5ab9a..0ed37dd9d80b4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1058,6 +1058,7 @@ ccorr0: ccorr@1400f000 { interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_CCORR0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; }; aal0: aal@14010000 { @@ -1067,6 +1068,7 @@ aal0: aal@14010000 { interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_LOW>; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_AAL0>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>; }; gamma0: gamma@14011000 { @@ -1075,6 +1077,7 @@ gamma0: gamma@14011000 { interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_LOW>; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_GAMMA0>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; }; dither0: dither@14012000 { @@ -1083,6 +1086,7 @@ dither0: dither@14012000 { interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_DITHER0>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; }; dsi0: dsi@14014000 {
Add mediatek,gce-client-reg for ccorr, aal, gamma, dither. Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++++ 1 file changed, 4 insertions(+)