From patchwork Thu Mar 11 02:09:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12130155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10C79C433DB for ; Thu, 11 Mar 2021 02:12:02 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A3F3564FAA for ; Thu, 11 Mar 2021 02:12:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A3F3564FAA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=NJJeOqRm5X7jlHLGSVzBBfX6flNBCwnij9U6AW53kOo=; b=OIcqbs/AzG7s0I41ag35vbOmAc UY1Ihn5/gWZbvhJ2Vhd8sFwNYrPfDFaE4H+SItB6yQjOci5TmFKNfUR6EpeRFjI3DjV7Dhbhs+m5F ctoVYVj+L5LyqO9PP4BOsXw1JVoYuBfOiQpBLGBiArpBU5hxYwJXwOFfIfVVURhTOyOrYI85w4fck SRZYZXVMP5Tsw2l0YScOgSh/Jx538tNz15Cn6iFJw+nwK2Fg7I5f69CjhSQjBgUpjeLESHXCehTih 9QNtSLjWgBJY/7o85lsHB746sv6mzQ8IHDBEICBNGZauvTT0JUdYZG0IRAksEOGSYsYd5Ng9eVbGO nYnIuE2Q==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lKAnn-008EPU-A8; Thu, 11 Mar 2021 02:11:51 +0000 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lKAnc-008EO8-KM; Thu, 11 Mar 2021 02:11:42 +0000 Received: by mail-pl1-x636.google.com with SMTP id w7so5969275pll.8; Wed, 10 Mar 2021 18:11:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=te3KkZ/7y8l0N1gnz9fMIpGsfWHYXiKPURp+vcWCB8E=; b=tVjmXz8D0DjaTjmoWHqistDrym+xbYTnEJwbOaaa4yZ1NOFOvMdMzWtNc9TMAA/O0B zcQi5pgNIF7Fogaq3ReeNE6T9ZdXBzO+0MER/mX5knRuCCxqTjVeuCCONRQqtrnDx1hc mfGPZZJVpmR7eF6jRRYPB090LmBGJPlnUqeF1uu+L5uBDe5l1BulZJpcmvpbvHMCMZnJ tNJsB8TteEWRJgX0EW631qHAfg1o72qZWlEzqW8yAMei17a6bf1AYnNYPczPAmZh3LOb i1FlLZgigsiVCar4a7KETtiqFzD399/pmxUT5LPf8fbICSqSGcal+usmRD98NzJJPkMV c1mQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=te3KkZ/7y8l0N1gnz9fMIpGsfWHYXiKPURp+vcWCB8E=; b=PgdliPBn1aZ5ex2Cy6Gn69aNOlXCoFcH6ilns1RGRmndfDekZpqcshL33cvIuoI948 LnWN4UcQwjCPs73WvDILkf25TdESY7YgBtuqC0uVQCQLa6Zgj/T+Ug+t4bwWvv8if7/S jf65AmVf2ozZ/uaJBmb5U8G6Ac1BxS8VZ3y5NG5gt4xbA8k29qaGSDp8UWZwe9OPXYm2 hHHMOXDUfH6h7QXnVa5AOL/vXKRZMhIOMVULKRmRVDnht+IFlu92IZ61JQirLvtVtsQ7 V1RUvPKye4YriZ7RMelE7EgQ/x1yLIcv227JIYxpZn90uDEyZbPe3ua0rL4FtQ0yRhRU 4eCQ== X-Gm-Message-State: AOAM532x7GDI/zmZ/Tt87JzJvhR1zgR+kQiEIqHJn5KyXk+L4VhaPHUq hjh/Lwj3DBOfn2IbkKhwO5g= X-Google-Smtp-Source: ABdhPJzbEp3URJUAJUmTC9QVWB1XRmvmvC/eT7dP/QVWbmPd5x+UG2+7fDGLo72jWAOVPTg54utsBA== X-Received: by 2002:a17:902:10a:b029:e2:e8f7:2988 with SMTP id 10-20020a170902010ab02900e2e8f72988mr5733060plb.4.1615428699155; Wed, 10 Mar 2021 18:11:39 -0800 (PST) Received: from z640-arch.lan ([2602:61:738f:1000::678]) by smtp.gmail.com with ESMTPSA id p190sm672603pga.78.2021.03.10.18.11.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 18:11:38 -0800 (PST) From: Ilya Lipnitskiy To: Sean Wang , Landen Chao , Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Matthias Brugger , Philipp Zabel , Russell King , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Ilya Lipnitskiy Subject: [PATCH net-next, v2 1/3] net: dsa: mt7530: setup core clock even in TRGMII mode Date: Wed, 10 Mar 2021 18:09:52 -0800 Message-Id: <20210311020954.842341-1-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210311_021140_797478_931ED963 X-CRM114-Status: GOOD ( 12.18 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org A recent change to MIPS ralink reset logic made it so mt7530 actually resets the switch on platforms such as mt7621 (where bit 2 is the reset line for the switch). That exposed an issue where the switch would not function properly in TRGMII mode after a reset. Reconfigure core clock in TRGMII mode to fix the issue. Tested on Ubiquiti ER-X (MT7621) with TRGMII mode enabled. Fixes: 3f9ef7785a9c ("MIPS: ralink: manage low reset lines") Signed-off-by: Ilya Lipnitskiy --- drivers/net/dsa/mt7530.c | 52 +++++++++++++++++++--------------------- 1 file changed, 25 insertions(+), 27 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index f06f5fa2f898..9871d7cff93a 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -436,34 +436,32 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) TD_DM_DRVP(8) | TD_DM_DRVN(8)); /* Setup core clock for MT7530 */ - if (!trgint) { - /* Disable MT7530 core clock */ - core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN); - - /* Disable PLL, since phy_device has not yet been created - * provided for phy_[read,write]_mmd_indirect is called, we - * provide our own core_write_mmd_indirect to complete this - * function. - */ - core_write_mmd_indirect(priv, - CORE_GSWPLL_GRP1, - MDIO_MMD_VEND2, - 0); - - /* Set core clock into 500Mhz */ - core_write(priv, CORE_GSWPLL_GRP2, - RG_GSWPLL_POSDIV_500M(1) | - RG_GSWPLL_FBKDIV_500M(25)); + /* Disable MT7530 core clock */ + core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN); - /* Enable PLL */ - core_write(priv, CORE_GSWPLL_GRP1, - RG_GSWPLL_EN_PRE | - RG_GSWPLL_POSDIV_200M(2) | - RG_GSWPLL_FBKDIV_200M(32)); - - /* Enable MT7530 core clock */ - core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN); - } + /* Disable PLL, since phy_device has not yet been created + * provided for phy_[read,write]_mmd_indirect is called, we + * provide our own core_write_mmd_indirect to complete this + * function. + */ + core_write_mmd_indirect(priv, + CORE_GSWPLL_GRP1, + MDIO_MMD_VEND2, + 0); + + /* Set core clock into 500Mhz */ + core_write(priv, CORE_GSWPLL_GRP2, + RG_GSWPLL_POSDIV_500M(1) | + RG_GSWPLL_FBKDIV_500M(25)); + + /* Enable PLL */ + core_write(priv, CORE_GSWPLL_GRP1, + RG_GSWPLL_EN_PRE | + RG_GSWPLL_POSDIV_200M(2) | + RG_GSWPLL_FBKDIV_200M(32)); + + /* Enable MT7530 core clock */ + core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN); /* Setup the MT7530 TRGMII Tx Clock */ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);