diff mbox series

[v7,1/3] arm64: dts: mt8183: add thermal zone node

Message ID 20210316070144.28440-2-michael.kao@mediatek.com (mailing list archive)
State New, archived
Headers show
Series mt8183: Add Mediatek thermal driver and dtsi | expand

Commit Message

Michael Kao March 16, 2021, 7:01 a.m. UTC
From: "michael.kao" <michael.kao@mediatek.com>

Add thermal zone node to Mediatek MT8183 dts file.

Evaluate the thermal zone every 500ms while not cooling
and every 100ms when passive cooling is performed.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
 1 file changed, 85 insertions(+)

Comments

Hsin-Yi Wang March 22, 2021, 11:20 a.m. UTC | #1
On Tue, Mar 16, 2021 at 3:02 PM Michael Kao <michael.kao@mediatek.com> wrote:
>
> From: "michael.kao" <michael.kao@mediatek.com>
>
> Add thermal zone node to Mediatek MT8183 dts file.
>
> Evaluate the thermal zone every 500ms while not cooling
> and every 100ms when passive cooling is performed.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> Signed-off-by: Michael Kao <michael.kao@mediatek.com>

Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>

Tested this patch on mt8183 devices.

> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
>  1 file changed, 85 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5b782a4769e7..d3550af06408 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -657,6 +657,87 @@
>                         status = "disabled";
>                 };
>
> +               thermal: thermal@1100b000 {
> +                       #thermal-sensor-cells = <1>;
> +                       compatible = "mediatek,mt8183-thermal";
> +                       reg = <0 0x1100b000 0 0x1000>;
> +                       clocks = <&infracfg CLK_INFRA_THERM>,
> +                                <&infracfg CLK_INFRA_AUXADC>;
> +                       clock-names = "therm", "auxadc";
> +                       resets = <&infracfg  MT8183_INFRACFG_AO_THERM_SW_RST>;
> +                       interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
> +                       mediatek,auxadc = <&auxadc>;
> +                       mediatek,apmixedsys = <&apmixedsys>;
> +                       nvmem-cells = <&thermal_calibration>;
> +                       nvmem-cell-names = "calibration-data";
> +               };
> +
> +               thermal-zones {
> +                       cpu_thermal: cpu_thermal {
> +                               polling-delay-passive = <100>;
> +                               polling-delay = <500>;
> +                               thermal-sensors = <&thermal 0>;
> +                               sustainable-power = <5000>;
> +                       };
> +
> +                       /* The tzts1 ~ tzts6 don't need to polling */
> +                       /* The tzts1 ~ tzts6 don't need to thermal throttle */
> +
> +                       tzts1: tzts1 {
> +                               polling-delay-passive = <0>;
> +                               polling-delay = <0>;
> +                               thermal-sensors = <&thermal 1>;
> +                               sustainable-power = <5000>;
> +                               trips {};
> +                               cooling-maps {};
> +                       };
> +
> +                       tzts2: tzts2 {
> +                               polling-delay-passive = <0>;
> +                               polling-delay = <0>;
> +                               thermal-sensors = <&thermal 2>;
> +                               sustainable-power = <5000>;
> +                               trips {};
> +                               cooling-maps {};
> +                       };
> +
> +                       tzts3: tzts3 {
> +                               polling-delay-passive = <0>;
> +                               polling-delay = <0>;
> +                               thermal-sensors = <&thermal 3>;
> +                               sustainable-power = <5000>;
> +                               trips {};
> +                               cooling-maps {};
> +                       };
> +
> +                       tzts4: tzts4 {
> +                               polling-delay-passive = <0>;
> +                               polling-delay = <0>;
> +                               thermal-sensors = <&thermal 4>;
> +                               sustainable-power = <5000>;
> +                               trips {};
> +                               cooling-maps {};
> +                       };
> +
> +                       tzts5: tzts5 {
> +                               polling-delay-passive = <0>;
> +                               polling-delay = <0>;
> +                               thermal-sensors = <&thermal 5>;
> +                               sustainable-power = <5000>;
> +                               trips {};
> +                               cooling-maps {};
> +                       };
> +
> +                       tztsABB: tztsABB {
> +                               polling-delay-passive = <0>;
> +                               polling-delay = <0>;
> +                               thermal-sensors = <&thermal 6>;
> +                               sustainable-power = <5000>;
> +                               trips {};
> +                               cooling-maps {};
> +                       };
> +               };
> +
>                 pwm0: pwm@1100e000 {
>                         compatible = "mediatek,mt8183-disp-pwm";
>                         reg = <0 0x1100e000 0 0x1000>;
> @@ -926,6 +1007,10 @@
>                         reg = <0 0x11f10000 0 0x1000>;
>                         #address-cells = <1>;
>                         #size-cells = <1>;
> +                       thermal_calibration: calib@180 {
> +                               reg = <0x180 0xc>;
> +                       };
> +
>                         mipi_tx_calibration: calib@190 {
>                                 reg = <0x190 0xc>;
>                         };
> --
> 2.18.0
>
Matthias Brugger March 29, 2021, 5:08 p.m. UTC | #2
On 22/03/2021 12:20, Hsin-Yi Wang wrote:
> On Tue, Mar 16, 2021 at 3:02 PM Michael Kao <michael.kao@mediatek.com> wrote:
>>
>> From: "michael.kao" <michael.kao@mediatek.com>
>>
>> Add thermal zone node to Mediatek MT8183 dts file.
>>
>> Evaluate the thermal zone every 500ms while not cooling
>> and every 100ms when passive cooling is performed.
>>
>> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
>> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> 
> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
> 

Applied to v5.12-next/dts64

Thanks!

> Tested this patch on mt8183 devices.
> 
>> ---
>>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
>>  1 file changed, 85 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>> index 5b782a4769e7..d3550af06408 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>> @@ -657,6 +657,87 @@
>>                         status = "disabled";
>>                 };
>>
>> +               thermal: thermal@1100b000 {
>> +                       #thermal-sensor-cells = <1>;
>> +                       compatible = "mediatek,mt8183-thermal";
>> +                       reg = <0 0x1100b000 0 0x1000>;
>> +                       clocks = <&infracfg CLK_INFRA_THERM>,
>> +                                <&infracfg CLK_INFRA_AUXADC>;
>> +                       clock-names = "therm", "auxadc";
>> +                       resets = <&infracfg  MT8183_INFRACFG_AO_THERM_SW_RST>;
>> +                       interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
>> +                       mediatek,auxadc = <&auxadc>;
>> +                       mediatek,apmixedsys = <&apmixedsys>;
>> +                       nvmem-cells = <&thermal_calibration>;
>> +                       nvmem-cell-names = "calibration-data";
>> +               };
>> +
>> +               thermal-zones {
>> +                       cpu_thermal: cpu_thermal {
>> +                               polling-delay-passive = <100>;
>> +                               polling-delay = <500>;
>> +                               thermal-sensors = <&thermal 0>;
>> +                               sustainable-power = <5000>;
>> +                       };
>> +
>> +                       /* The tzts1 ~ tzts6 don't need to polling */
>> +                       /* The tzts1 ~ tzts6 don't need to thermal throttle */
>> +
>> +                       tzts1: tzts1 {
>> +                               polling-delay-passive = <0>;
>> +                               polling-delay = <0>;
>> +                               thermal-sensors = <&thermal 1>;
>> +                               sustainable-power = <5000>;
>> +                               trips {};
>> +                               cooling-maps {};
>> +                       };
>> +
>> +                       tzts2: tzts2 {
>> +                               polling-delay-passive = <0>;
>> +                               polling-delay = <0>;
>> +                               thermal-sensors = <&thermal 2>;
>> +                               sustainable-power = <5000>;
>> +                               trips {};
>> +                               cooling-maps {};
>> +                       };
>> +
>> +                       tzts3: tzts3 {
>> +                               polling-delay-passive = <0>;
>> +                               polling-delay = <0>;
>> +                               thermal-sensors = <&thermal 3>;
>> +                               sustainable-power = <5000>;
>> +                               trips {};
>> +                               cooling-maps {};
>> +                       };
>> +
>> +                       tzts4: tzts4 {
>> +                               polling-delay-passive = <0>;
>> +                               polling-delay = <0>;
>> +                               thermal-sensors = <&thermal 4>;
>> +                               sustainable-power = <5000>;
>> +                               trips {};
>> +                               cooling-maps {};
>> +                       };
>> +
>> +                       tzts5: tzts5 {
>> +                               polling-delay-passive = <0>;
>> +                               polling-delay = <0>;
>> +                               thermal-sensors = <&thermal 5>;
>> +                               sustainable-power = <5000>;
>> +                               trips {};
>> +                               cooling-maps {};
>> +                       };
>> +
>> +                       tztsABB: tztsABB {
>> +                               polling-delay-passive = <0>;
>> +                               polling-delay = <0>;
>> +                               thermal-sensors = <&thermal 6>;
>> +                               sustainable-power = <5000>;
>> +                               trips {};
>> +                               cooling-maps {};
>> +                       };
>> +               };
>> +
>>                 pwm0: pwm@1100e000 {
>>                         compatible = "mediatek,mt8183-disp-pwm";
>>                         reg = <0 0x1100e000 0 0x1000>;
>> @@ -926,6 +1007,10 @@
>>                         reg = <0 0x11f10000 0 0x1000>;
>>                         #address-cells = <1>;
>>                         #size-cells = <1>;
>> +                       thermal_calibration: calib@180 {
>> +                               reg = <0x180 0xc>;
>> +                       };
>> +
>>                         mipi_tx_calibration: calib@190 {
>>                                 reg = <0x190 0xc>;
>>                         };
>> --
>> 2.18.0
>>
Daniel Lezcano April 9, 2021, 8:09 a.m. UTC | #3
On 16/03/2021 08:01, Michael Kao wrote:
> From: "michael.kao" <michael.kao@mediatek.com>
> 
> Add thermal zone node to Mediatek MT8183 dts file.
> 
> Evaluate the thermal zone every 500ms while not cooling
> and every 100ms when passive cooling is performed.
> 
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
>  1 file changed, 85 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5b782a4769e7..d3550af06408 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -657,6 +657,87 @@
>  			status = "disabled";
>  		};
>  
> +		thermal: thermal@1100b000 {
> +			#thermal-sensor-cells = <1>;
> +			compatible = "mediatek,mt8183-thermal";
> +			reg = <0 0x1100b000 0 0x1000>;
> +			clocks = <&infracfg CLK_INFRA_THERM>,
> +				 <&infracfg CLK_INFRA_AUXADC>;
> +			clock-names = "therm", "auxadc";
> +			resets = <&infracfg  MT8183_INFRACFG_AO_THERM_SW_RST>;
> +			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
> +			mediatek,auxadc = <&auxadc>;
> +			mediatek,apmixedsys = <&apmixedsys>;
> +			nvmem-cells = <&thermal_calibration>;
> +			nvmem-cell-names = "calibration-data";
> +		};
> +
> +		thermal-zones {
> +			cpu_thermal: cpu_thermal {
> +				polling-delay-passive = <100>;
> +				polling-delay = <500>;
> +				thermal-sensors = <&thermal 0>;
> +				sustainable-power = <5000>;
> +			};
> +
> +			/* The tzts1 ~ tzts6 don't need to polling */
> +			/* The tzts1 ~ tzts6 don't need to thermal throttle */
> +
> +			tzts1: tzts1 {
> +				polling-delay-passive = <0>;
> +				polling-delay = <0>;
> +				thermal-sensors = <&thermal 1>;
> +				sustainable-power = <5000>;
> +				trips {};
> +				cooling-maps {};
> +			};

What is the point of defining the sustainable power with no cooling
device associated ?
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 5b782a4769e7..d3550af06408 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -657,6 +657,87 @@ 
 			status = "disabled";
 		};
 
+		thermal: thermal@1100b000 {
+			#thermal-sensor-cells = <1>;
+			compatible = "mediatek,mt8183-thermal";
+			reg = <0 0x1100b000 0 0x1000>;
+			clocks = <&infracfg CLK_INFRA_THERM>,
+				 <&infracfg CLK_INFRA_AUXADC>;
+			clock-names = "therm", "auxadc";
+			resets = <&infracfg  MT8183_INFRACFG_AO_THERM_SW_RST>;
+			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
+			mediatek,auxadc = <&auxadc>;
+			mediatek,apmixedsys = <&apmixedsys>;
+			nvmem-cells = <&thermal_calibration>;
+			nvmem-cell-names = "calibration-data";
+		};
+
+		thermal-zones {
+			cpu_thermal: cpu_thermal {
+				polling-delay-passive = <100>;
+				polling-delay = <500>;
+				thermal-sensors = <&thermal 0>;
+				sustainable-power = <5000>;
+			};
+
+			/* The tzts1 ~ tzts6 don't need to polling */
+			/* The tzts1 ~ tzts6 don't need to thermal throttle */
+
+			tzts1: tzts1 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 1>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tzts2: tzts2 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 2>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tzts3: tzts3 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 3>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tzts4: tzts4 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 4>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tzts5: tzts5 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 5>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tztsABB: tztsABB {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 6>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+		};
+
 		pwm0: pwm@1100e000 {
 			compatible = "mediatek,mt8183-disp-pwm";
 			reg = <0 0x1100e000 0 0x1000>;
@@ -926,6 +1007,10 @@ 
 			reg = <0 0x11f10000 0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+			thermal_calibration: calib@180 {
+				reg = <0x180 0xc>;
+			};
+
 			mipi_tx_calibration: calib@190 {
 				reg = <0x190 0xc>;
 			};