diff mbox series

[RESEND,v7,01/22] dt-bindings: ARM: Mediatek: Add new document bindings of imp i2c wrapper controller

Message ID 20210324104110.13383-2-chun-jie.chen@mediatek.com (mailing list archive)
State New
Headers show
Series Mediatek MT8192 clock support | expand

Commit Message

Chun-Jie Chen March 24, 2021, 10:40 a.m. UTC
This patch adds the new binding documentation of imp i2c wrapper controller
for Mediatek MT8192.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: chun-jie.chen <chun-jie.chen@mediatek.com>
---
 .../arm/mediatek/mediatek,imp_iic_wrap.yaml   | 80 +++++++++++++++++++
 1 file changed, 80 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml

Comments

Stephen Boyd April 30, 2021, 1:42 a.m. UTC | #1
Please Cc devicetree@vger.kernel.org and use robh+dt@kernel.org for DT
bindings. This was waiting for DT review but because the right lists
weren't Cced it fell off the queue.

Quoting chun-jie.chen (2021-03-24 03:40:49)
> This patch adds the new binding documentation of imp i2c wrapper controller
> for Mediatek MT8192.
> 
> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> Signed-off-by: chun-jie.chen <chun-jie.chen@mediatek.com>
> ---
>  .../arm/mediatek/mediatek,imp_iic_wrap.yaml   | 80 +++++++++++++++++++
>  1 file changed, 80 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
> new file mode 100644
> index 000000000000..fb6cb9e60ee2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,imp_iic_wrap.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek IMP I2C Wrapper Controller
> +
> +maintainers:
> +  - Chun-Jie Chen <chun-jie.chen@mediatek.com>
> +
> +description:
> +  The Mediatek imp i2c wrapper controller provides functional configurations and clocks to the system.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - mediatek,mt8192-imp_iic_wrap_c
> +          - mediatek,mt8192-imp_iic_wrap_e
> +          - mediatek,mt8192-imp_iic_wrap_s
> +          - mediatek,mt8192-imp_iic_wrap_ws
> +          - mediatek,mt8192-imp_iic_wrap_w
> +          - mediatek,mt8192-imp_iic_wrap_n
> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#clock-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    imp_iic_wrap_c: syscon@11007000 {
> +        compatible = "mediatek,mt8192-imp_iic_wrap_c", "syscon";
> +        reg = <0x11007000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> +
> +  - |
> +    imp_iic_wrap_e: syscon@11cb1000 {
> +        compatible = "mediatek,mt8192-imp_iic_wrap_e", "syscon";
> +        reg = <0x11cb1000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> +
> +  - |
> +    imp_iic_wrap_s: syscon@11d03000 {
> +        compatible = "mediatek,mt8192-imp_iic_wrap_s", "syscon";
> +        reg = <0x11d03000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> +
> +  - |
> +    imp_iic_wrap_ws: syscon@11d23000 {
> +        compatible = "mediatek,mt8192-imp_iic_wrap_ws", "syscon";
> +        reg = <0x11d23000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> +
> +  - |
> +    imp_iic_wrap_w: syscon@11e01000 {
> +        compatible = "mediatek,mt8192-imp_iic_wrap_w", "syscon";
> +        reg = <0x11e01000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> +
> +  - |
> +    imp_iic_wrap_n: syscon@11f02000 {
> +        compatible = "mediatek,mt8192-imp_iic_wrap_n", "syscon";
> +        reg = <0x11f02000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> -- 
> 2.18.0
>
Chun-Jie Chen May 5, 2021, 11:23 a.m. UTC | #2
the mail list in patchwork seems to no update even I add more reviewer
by replying mail,
so I will send v8 for adding device tree reviewer, sorry for the
inconvenience.

On Thu, 2021-04-29 at 18:42 -0700, Stephen Boyd wrote:
> Please Cc devicetree@vger.kernel.org and use robh+dt@kernel.org for
> DT
> bindings. This was waiting for DT review but because the right lists
> weren't Cced it fell off the queue.
> 
> Quoting chun-jie.chen (2021-03-24 03:40:49)
> > This patch adds the new binding documentation of imp i2c wrapper
> > controller
> > for Mediatek MT8192.
> > 
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> > Signed-off-by: chun-jie.chen <chun-jie.chen@mediatek.com>
> > ---
> >  .../arm/mediatek/mediatek,imp_iic_wrap.yaml   | 80
> > +++++++++++++++++++
> >  1 file changed, 80 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wra
> > p.yaml
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_w
> > rap.yaml
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_w
> > rap.yaml
> > new file mode 100644
> > index 000000000000..fb6cb9e60ee2
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_w
> > rap.yaml
> > @@ -0,0 +1,80 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: 
> > https://urldefense.com/v3/__http://devicetree.org/schemas/arm/mediatek/mediatek,imp_iic_wrap.yaml*__;Iw!!CTRNKA9wMg0ARbw!zBjsgUmEFn39CiAYbdvjgfS-ucvRLXrZkdtlMOnVKeNDFyjwC3IIoNkKYdm_kZGjQbbv$
> >  
> > +$schema: 
> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!zBjsgUmEFn39CiAYbdvjgfS-ucvRLXrZkdtlMOnVKeNDFyjwC3IIoNkKYdm_kTIaPcIk$
> >  
> > +
> > +title: MediaTek IMP I2C Wrapper Controller
> > +
> > +maintainers:
> > +  - Chun-Jie Chen <chun-jie.chen@mediatek.com>
> > +
> > +description:
> > +  The Mediatek imp i2c wrapper controller provides functional
> > configurations and clocks to the system.
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - mediatek,mt8192-imp_iic_wrap_c
> > +          - mediatek,mt8192-imp_iic_wrap_e
> > +          - mediatek,mt8192-imp_iic_wrap_s
> > +          - mediatek,mt8192-imp_iic_wrap_ws
> > +          - mediatek,mt8192-imp_iic_wrap_w
> > +          - mediatek,mt8192-imp_iic_wrap_n
> > +      - const: syscon
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  '#clock-cells':
> > +    const: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    imp_iic_wrap_c: syscon@11007000 {
> > +        compatible = "mediatek,mt8192-imp_iic_wrap_c", "syscon";
> > +        reg = <0x11007000 0x1000>;
> > +        #clock-cells = <1>;
> > +    };
> > +
> > +  - |
> > +    imp_iic_wrap_e: syscon@11cb1000 {
> > +        compatible = "mediatek,mt8192-imp_iic_wrap_e", "syscon";
> > +        reg = <0x11cb1000 0x1000>;
> > +        #clock-cells = <1>;
> > +    };
> > +
> > +  - |
> > +    imp_iic_wrap_s: syscon@11d03000 {
> > +        compatible = "mediatek,mt8192-imp_iic_wrap_s", "syscon";
> > +        reg = <0x11d03000 0x1000>;
> > +        #clock-cells = <1>;
> > +    };
> > +
> > +  - |
> > +    imp_iic_wrap_ws: syscon@11d23000 {
> > +        compatible = "mediatek,mt8192-imp_iic_wrap_ws", "syscon";
> > +        reg = <0x11d23000 0x1000>;
> > +        #clock-cells = <1>;
> > +    };
> > +
> > +  - |
> > +    imp_iic_wrap_w: syscon@11e01000 {
> > +        compatible = "mediatek,mt8192-imp_iic_wrap_w", "syscon";
> > +        reg = <0x11e01000 0x1000>;
> > +        #clock-cells = <1>;
> > +    };
> > +
> > +  - |
> > +    imp_iic_wrap_n: syscon@11f02000 {
> > +        compatible = "mediatek,mt8192-imp_iic_wrap_n", "syscon";
> > +        reg = <0x11f02000 0x1000>;
> > +        #clock-cells = <1>;
> > +    };
> > -- 
> > 2.18.0
> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
new file mode 100644
index 000000000000..fb6cb9e60ee2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
@@ -0,0 +1,80 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,imp_iic_wrap.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek IMP I2C Wrapper Controller
+
+maintainers:
+  - Chun-Jie Chen <chun-jie.chen@mediatek.com>
+
+description:
+  The Mediatek imp i2c wrapper controller provides functional configurations and clocks to the system.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - mediatek,mt8192-imp_iic_wrap_c
+          - mediatek,mt8192-imp_iic_wrap_e
+          - mediatek,mt8192-imp_iic_wrap_s
+          - mediatek,mt8192-imp_iic_wrap_ws
+          - mediatek,mt8192-imp_iic_wrap_w
+          - mediatek,mt8192-imp_iic_wrap_n
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    imp_iic_wrap_c: syscon@11007000 {
+        compatible = "mediatek,mt8192-imp_iic_wrap_c", "syscon";
+        reg = <0x11007000 0x1000>;
+        #clock-cells = <1>;
+    };
+
+  - |
+    imp_iic_wrap_e: syscon@11cb1000 {
+        compatible = "mediatek,mt8192-imp_iic_wrap_e", "syscon";
+        reg = <0x11cb1000 0x1000>;
+        #clock-cells = <1>;
+    };
+
+  - |
+    imp_iic_wrap_s: syscon@11d03000 {
+        compatible = "mediatek,mt8192-imp_iic_wrap_s", "syscon";
+        reg = <0x11d03000 0x1000>;
+        #clock-cells = <1>;
+    };
+
+  - |
+    imp_iic_wrap_ws: syscon@11d23000 {
+        compatible = "mediatek,mt8192-imp_iic_wrap_ws", "syscon";
+        reg = <0x11d23000 0x1000>;
+        #clock-cells = <1>;
+    };
+
+  - |
+    imp_iic_wrap_w: syscon@11e01000 {
+        compatible = "mediatek,mt8192-imp_iic_wrap_w", "syscon";
+        reg = <0x11e01000 0x1000>;
+        #clock-cells = <1>;
+    };
+
+  - |
+    imp_iic_wrap_n: syscon@11f02000 {
+        compatible = "mediatek,mt8192-imp_iic_wrap_n", "syscon";
+        reg = <0x11f02000 0x1000>;
+        #clock-cells = <1>;
+    };