From patchwork Wed Mar 24 10:40:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chun-Jie Chen X-Patchwork-Id: 12160707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 612ACC433DB for ; Wed, 24 Mar 2021 10:50:27 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 00F6261A05 for ; Wed, 24 Mar 2021 10:50:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 00F6261A05 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=s1KqAl0JOFKg0pz2WlTNoCJ6RXFg+9+kM8sMsdquw38=; b=OzfF46KeFDMGYtmU63Al3Bhcs gx+GW5Hj3reNcz5GFWMpe+CpexbDXNXpMPdryvyPRY5XRCbImpinhXLCSvkYnibkneMWKVWk4JE9f ctgCS7dMy6Mki0FbeYUbAxwd8QrjB3G1ahkRHQ5SV/z0PV+RFBaDNjA5x03uWbJUPXTChtK7DZiRq 0kUKTR2YXQezMSpgEjuC5tQeoZn65FIqmXp0IWp9hd7YFUoRCU5DbjkVzZGUKgAmNA10Uo5x+wWbR Nq1YZvfGSFqKRHhA8t+Cd5a6ZmYEehaR6zlQZD1Jh/wf98DXP4ZLko00de3A/hUyRxnB40NYqAYm4 3U+QOvF3w==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lP15V-00Gu4W-Hh; Wed, 24 Mar 2021 10:50:09 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lP15I-00Gu1G-Ti; Wed, 24 Mar 2021 10:49:59 +0000 X-UUID: 5823fe57ad154448986442da5ceb6959-20210324 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=QvtKCMBBQcoNWh9/sXHAdCGTJLRvd7H6GdGx4BD6lsY=; b=lt3sgpFj2are52bM70k0nSmKXPTzE0IfhPTs62SH+zBi+j87Ytd72f/n+k7oj5dBGu8aD1GRuAYz1Oh95NbuA0eMW86GSKLPjF6ufwO8QhZGKG4yBzq9n+qyEhP9LUqNEnM4/mIsPzKngHOf6r1ncyOYhMs13COvNPSIgkqVV3c=; X-UUID: 5823fe57ad154448986442da5ceb6959-20210324 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1931956459; Wed, 24 Mar 2021 02:49:52 -0800 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 24 Mar 2021 03:41:26 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 24 Mar 2021 18:41:24 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 24 Mar 2021 18:41:24 +0800 From: chun-jie.chen To: Matthias Brugger , Rob Herring , Stephen Boyd , Nicolas Boichat CC: , , , , , , chun-jie.chen , Weiyi Lu Subject: [RESEND PATCH v7 03/22] dt-bindings: ARM: Mediatek: Add new document bindings of msdc controller Date: Wed, 24 Mar 2021 18:40:51 +0800 Message-ID: <20210324104110.13383-4-chun-jie.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210324104110.13383-1-chun-jie.chen@mediatek.com> References: <20210324104110.13383-1-chun-jie.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210324_104957_573266_2E37BC75 X-CRM114-Status: GOOD ( 14.21 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org This patch adds the new binding documentation of msdc controller for Mediatek MT8192. Signed-off-by: Weiyi Lu Signed-off-by: chun-jie.chen --- .../bindings/arm/mediatek/mediatek,msdc.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml new file mode 100644 index 000000000000..10eb43de2d2b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,msdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MSDC Controller + +maintainers: + - Chun-Jie Chen + +description: + The Mediatek msdc controller provides functional configurations and clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-msdc + - mediatek,mt8192-msdc_top + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + msdc: syscon@11f60000 { + compatible = "mediatek,mt8192-msdc", "syscon"; + reg = <0x11f60000 0x1000>; + #clock-cells = <1>; + }; + + - | + msdc_top: syscon@11f10000 { + compatible = "mediatek,mt8192-msdc_top", "syscon"; + reg = <0x11f10000 0x1000>; + #clock-cells = <1>; + };