diff mbox series

[v2] dt-bindings: mediatek: convert mtk jpeg decoder/encoder to yaml

Message ID 20210609180130.693944-1-hsinyi@chromium.org (mailing list archive)
State New
Headers show
Series [v2] dt-bindings: mediatek: convert mtk jpeg decoder/encoder to yaml | expand

Commit Message

Hsin-Yi Wang June 9, 2021, 6:01 p.m. UTC
Convert mediatek jpeg decoder and encoder bindings to yaml.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
v2: fix dt_binding_check errors
---
 .../bindings/media/mediatek-jpeg-decoder.txt  | 38 ----------
 .../bindings/media/mediatek-jpeg-decoder.yaml | 76 +++++++++++++++++++
 .../bindings/media/mediatek-jpeg-encoder.txt  | 35 ---------
 .../bindings/media/mediatek-jpeg-encoder.yaml | 68 +++++++++++++++++
 4 files changed, 144 insertions(+), 73 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
 create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
 delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
 create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml

Comments

Matthias Brugger June 10, 2021, 8:37 a.m. UTC | #1
Hi Hsin-Yi,

On 09/06/2021 20:01, Hsin-Yi Wang wrote:
> Convert mediatek jpeg decoder and encoder bindings to yaml.
> 
> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> ---
> v2: fix dt_binding_check errors
> ---
>  .../bindings/media/mediatek-jpeg-decoder.txt  | 38 ----------
>  .../bindings/media/mediatek-jpeg-decoder.yaml | 76 +++++++++++++++++++
>  .../bindings/media/mediatek-jpeg-encoder.txt  | 35 ---------
>  .../bindings/media/mediatek-jpeg-encoder.yaml | 68 +++++++++++++++++
>  4 files changed, 144 insertions(+), 73 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
>  create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
>  delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
>  create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> deleted file mode 100644
> index 39c1028b2dfb4..0000000000000
> --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> +++ /dev/null
> @@ -1,38 +0,0 @@
> -* Mediatek JPEG Decoder
> -
> -Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
> -
> -Required properties:
> -- compatible : must be one of the following string:
> -	"mediatek,mt8173-jpgdec"
> -	"mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
> -	"mediatek,mt2701-jpgdec"
> -- reg : physical base address of the jpeg decoder registers and length of
> -  memory mapped region.
> -- interrupts : interrupt number to the interrupt controller.
> -- clocks: device clocks, see
> -  Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> -- clock-names: must contain "jpgdec-smi" and "jpgdec".
> -- power-domains: a phandle to the power domain, see
> -  Documentation/devicetree/bindings/power/power_domain.txt for details.
> -- mediatek,larb: must contain the local arbiters in the current Socs, see
> -  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
> -  for details.

We miss the mediatek,larb in the yaml.

> -- iommus: should point to the respective IOMMU block with master port as
> -  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> -  for details.
> -
> -Example:
> -	jpegdec: jpegdec@15004000 {
> -		compatible = "mediatek,mt2701-jpgdec";
> -		reg = <0 0x15004000 0 0x1000>;
> -		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
> -		clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
> -			  <&imgsys CLK_IMG_JPGDEC>;
> -		clock-names = "jpgdec-smi",
> -			      "jpgdec";
> -		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> -		mediatek,larb = <&larb2>;
> -		iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
> -			 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
> -	};
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> new file mode 100644
> index 0000000000000..821e6b480901a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> @@ -0,0 +1,76 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek JPEG Decoder Device Tree Bindings
> +
> +maintainers:
> +  - Xia Jiang <xia.jiang@mediatek.com>
> +
> +description: |-
> +  Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: mediatek,mt8173-jpgdec
> +      - items:
> +          - const: mediatek,mt2701-jpgdec
> +      - items:
> +          - enum:
> +              - mediatek,mt7623-jpgdec
> +          - const: mediatek,mt2701-jpgdec
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 2
> +    minItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: jpgdec-smi
> +      - const: jpgdec
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  iommus:
> +    maxItems: 2
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - power-domains
> +  - iommus
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/mt2701-clk.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/memory/mt2701-larb-port.h>
> +    #include <dt-bindings/power/mt2701-power.h>
> +    jpegdec: jpegdec@15004000 {
> +      compatible = "mediatek,mt2701-jpgdec";
> +      reg = <0x15004000 0x1000>;
> +      interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
> +      clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
> +                <&imgsys CLK_IMG_JPGDEC>;
> +      clock-names = "jpgdec-smi",
> +                    "jpgdec";
> +      power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> +      iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
> +               <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
> +    };
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> deleted file mode 100644
> index 5e53c6ab52d01..0000000000000
> --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> +++ /dev/null
> @@ -1,35 +0,0 @@
> -* MediaTek JPEG Encoder
> -
> -MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
> -
> -Required properties:
> -- compatible : "mediatek,mt2701-jpgenc"
> -  followed by "mediatek,mtk-jpgenc"
> -- reg : physical base address of the JPEG encoder registers and length of
> -  memory mapped region.
> -- interrupts : interrupt number to the interrupt controller.
> -- clocks: device clocks, see
> -  Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> -- clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
> -- power-domains: a phandle to the power domain, see
> -  Documentation/devicetree/bindings/power/power_domain.txt for details.
> -- mediatek,larb: must contain the local arbiters in the current SoCs, see
> -  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
> -  for details.

Same here.

Regards,
Matthias
Yong Wu June 10, 2021, 11:57 a.m. UTC | #2
On Thu, 2021-06-10 at 10:37 +0200, Matthias Brugger wrote:
> Hi Hsin-Yi,
> 
> On 09/06/2021 20:01, Hsin-Yi Wang wrote:
> > Convert mediatek jpeg decoder and encoder bindings to yaml.
> > 
> > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> > ---
> > v2: fix dt_binding_check errors
> > ---
> >  .../bindings/media/mediatek-jpeg-decoder.txt  | 38 ----------
> >  .../bindings/media/mediatek-jpeg-decoder.yaml | 76 +++++++++++++++++++
> >  .../bindings/media/mediatek-jpeg-encoder.txt  | 35 ---------
> >  .../bindings/media/mediatek-jpeg-encoder.yaml | 68 +++++++++++++++++
> >  4 files changed, 144 insertions(+), 73 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> >  create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> >  delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> >  create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> > deleted file mode 100644
> > index 39c1028b2dfb4..0000000000000
> > --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> > +++ /dev/null
> > @@ -1,38 +0,0 @@
> > -* Mediatek JPEG Decoder
> > -
> > -Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
> > -
> > -Required properties:
> > -- compatible : must be one of the following string:
> > -	"mediatek,mt8173-jpgdec"
> > -	"mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
> > -	"mediatek,mt2701-jpgdec"
> > -- reg : physical base address of the jpeg decoder registers and length of
> > -  memory mapped region.
> > -- interrupts : interrupt number to the interrupt controller.
> > -- clocks: device clocks, see
> > -  Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> > -- clock-names: must contain "jpgdec-smi" and "jpgdec".
> > -- power-domains: a phandle to the power domain, see
> > -  Documentation/devicetree/bindings/power/power_domain.txt for details.
> > -- mediatek,larb: must contain the local arbiters in the current Socs, see
> > -  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
> > -  for details.
> 
> We miss the mediatek,larb in the yaml.

Hi Hsin-Yi,

I will rebase this one when removing mediatek,larb.

> 
> > -- iommus: should point to the respective IOMMU block with master port as
> > -  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> > -  for details.
> > -
> > -Example:
> > -	jpegdec: jpegdec@15004000 {
> > -		compatible = "mediatek,mt2701-jpgdec";
> > -		reg = <0 0x15004000 0 0x1000>;
> > -		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
> > -		clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
> > -			  <&imgsys CLK_IMG_JPGDEC>;
> > -		clock-names = "jpgdec-smi",
> > -			      "jpgdec";
> > -		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> > -		mediatek,larb = <&larb2>;
> > -		iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
> > -			 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
> > -	};
> > diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> > new file mode 100644
> > index 0000000000000..821e6b480901a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> > @@ -0,0 +1,76 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek JPEG Decoder Device Tree Bindings
> > +
> > +maintainers:
> > +  - Xia Jiang <xia.jiang@mediatek.com>
> > +
> > +description: |-
> > +  Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
> > +
> > +properties:
> > +  compatible:
> > +    oneOf:
> > +      - items:
> > +          - const: mediatek,mt8173-jpgdec
> > +      - items:
> > +          - const: mediatek,mt2701-jpgdec
> > +      - items:
> > +          - enum:
> > +              - mediatek,mt7623-jpgdec
> > +          - const: mediatek,mt2701-jpgdec
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 2
> > +    minItems: 2
> > +
> > +  clock-names:
> > +    items:
> > +      - const: jpgdec-smi
> > +      - const: jpgdec
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  iommus:
> > +    maxItems: 2
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - clocks
> > +  - clock-names
> > +  - power-domains
> > +  - iommus
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/mt2701-clk.h>
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/memory/mt2701-larb-port.h>
> > +    #include <dt-bindings/power/mt2701-power.h>
> > +    jpegdec: jpegdec@15004000 {
> > +      compatible = "mediatek,mt2701-jpgdec";
> > +      reg = <0x15004000 0x1000>;
> > +      interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
> > +      clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
> > +                <&imgsys CLK_IMG_JPGDEC>;
> > +      clock-names = "jpgdec-smi",
> > +                    "jpgdec";
> > +      power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> > +      iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
> > +               <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
> > +    };
> > diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> > deleted file mode 100644
> > index 5e53c6ab52d01..0000000000000
> > --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> > +++ /dev/null
> > @@ -1,35 +0,0 @@
> > -* MediaTek JPEG Encoder
> > -
> > -MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
> > -
> > -Required properties:
> > -- compatible : "mediatek,mt2701-jpgenc"
> > -  followed by "mediatek,mtk-jpgenc"
> > -- reg : physical base address of the JPEG encoder registers and length of
> > -  memory mapped region.
> > -- interrupts : interrupt number to the interrupt controller.
> > -- clocks: device clocks, see
> > -  Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> > -- clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
> > -- power-domains: a phandle to the power domain, see
> > -  Documentation/devicetree/bindings/power/power_domain.txt for details.
> > -- mediatek,larb: must contain the local arbiters in the current SoCs, see
> > -  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
> > -  for details.
> 
> Same here.
> 
> Regards,
> Matthias
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
deleted file mode 100644
index 39c1028b2dfb4..0000000000000
--- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
+++ /dev/null
@@ -1,38 +0,0 @@ 
-* Mediatek JPEG Decoder
-
-Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
-
-Required properties:
-- compatible : must be one of the following string:
-	"mediatek,mt8173-jpgdec"
-	"mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
-	"mediatek,mt2701-jpgdec"
-- reg : physical base address of the jpeg decoder registers and length of
-  memory mapped region.
-- interrupts : interrupt number to the interrupt controller.
-- clocks: device clocks, see
-  Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
-- clock-names: must contain "jpgdec-smi" and "jpgdec".
-- power-domains: a phandle to the power domain, see
-  Documentation/devicetree/bindings/power/power_domain.txt for details.
-- mediatek,larb: must contain the local arbiters in the current Socs, see
-  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
-  for details.
-- iommus: should point to the respective IOMMU block with master port as
-  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
-  for details.
-
-Example:
-	jpegdec: jpegdec@15004000 {
-		compatible = "mediatek,mt2701-jpgdec";
-		reg = <0 0x15004000 0 0x1000>;
-		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
-		clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
-			  <&imgsys CLK_IMG_JPGDEC>;
-		clock-names = "jpgdec-smi",
-			      "jpgdec";
-		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
-		mediatek,larb = <&larb2>;
-		iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
-			 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
-	};
diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
new file mode 100644
index 0000000000000..821e6b480901a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
@@ -0,0 +1,76 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek JPEG Decoder Device Tree Bindings
+
+maintainers:
+  - Xia Jiang <xia.jiang@mediatek.com>
+
+description: |-
+  Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: mediatek,mt8173-jpgdec
+      - items:
+          - const: mediatek,mt2701-jpgdec
+      - items:
+          - enum:
+              - mediatek,mt7623-jpgdec
+          - const: mediatek,mt2701-jpgdec
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 2
+    minItems: 2
+
+  clock-names:
+    items:
+      - const: jpgdec-smi
+      - const: jpgdec
+
+  power-domains:
+    maxItems: 1
+
+  iommus:
+    maxItems: 2
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - power-domains
+  - iommus
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt2701-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/memory/mt2701-larb-port.h>
+    #include <dt-bindings/power/mt2701-power.h>
+    jpegdec: jpegdec@15004000 {
+      compatible = "mediatek,mt2701-jpgdec";
+      reg = <0x15004000 0x1000>;
+      interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
+      clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
+                <&imgsys CLK_IMG_JPGDEC>;
+      clock-names = "jpgdec-smi",
+                    "jpgdec";
+      power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
+      iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
+               <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
+    };
diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
deleted file mode 100644
index 5e53c6ab52d01..0000000000000
--- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
+++ /dev/null
@@ -1,35 +0,0 @@ 
-* MediaTek JPEG Encoder
-
-MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
-
-Required properties:
-- compatible : "mediatek,mt2701-jpgenc"
-  followed by "mediatek,mtk-jpgenc"
-- reg : physical base address of the JPEG encoder registers and length of
-  memory mapped region.
-- interrupts : interrupt number to the interrupt controller.
-- clocks: device clocks, see
-  Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
-- clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
-- power-domains: a phandle to the power domain, see
-  Documentation/devicetree/bindings/power/power_domain.txt for details.
-- mediatek,larb: must contain the local arbiters in the current SoCs, see
-  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
-  for details.
-- iommus: should point to the respective IOMMU block with master port as
-  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
-  for details.
-
-Example:
-	jpegenc: jpegenc@1500a000 {
-		compatible = "mediatek,mt2701-jpgenc",
-			     "mediatek,mtk-jpgenc";
-		reg = <0 0x1500a000 0 0x1000>;
-		interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
-		clocks =  <&imgsys CLK_IMG_VENC>;
-		clock-names = "jpgenc";
-		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
-		mediatek,larb = <&larb2>;
-		iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
-			 <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
-	};
diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
new file mode 100644
index 0000000000000..bc4b5c3eda7b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
@@ -0,0 +1,68 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek JPEG Encoder Device Tree Bindings
+
+maintainers:
+  - Xia Jiang <xia.jiang@mediatek.com>
+
+description: |-
+  MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - mediatek,mt2701-jpgenc
+          - mediatek,mt8183-jpgenc
+      - const: mediatek,mtk-jpgenc
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: jpgenc
+
+  power-domains:
+    maxItems: 1
+
+  iommus:
+    maxItems: 2
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - power-domains
+  - iommus
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt2701-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/memory/mt2701-larb-port.h>
+    #include <dt-bindings/power/mt2701-power.h>
+    jpegenc: jpegenc@1500a000 {
+      compatible = "mediatek,mt2701-jpgenc",
+                   "mediatek,mtk-jpgenc";
+      reg = <0x1500a000 0x1000>;
+      interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
+      clocks =  <&imgsys CLK_IMG_VENC>;
+      clock-names = "jpgenc";
+      power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
+      iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
+               <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
+    };