[08/22] clk: mediatek: Add MT8195 ccusys clock support

Commit Message

Chun-Jie Chen June 16, 2021, 10:47 p.m. UTC

Add MT8195 ccusys clock provider

Signed-off-by: Chun-Jie Chen <[e-mail]>
---
 drivers/clk/mediatek/Kconfig          |  6 ++++
 drivers/clk/mediatek/Makefile         |  1 +
 drivers/clk/mediatek/clk-mt8195-ccu.c | 52 +++++++++++++++++++++++++++
 3 files changed, 59 insertions(+)
 create mode 100644 drivers/clk/mediatek/clk-mt8195-ccu.c

Comments

Chen-Yu Tsai July 6, 2021, 9 a.m. UTC | #1

On Thu, Jun 17, 2021 at 6:59 AM Chun-Jie Chen
<[e-mail]> wrote:
>
> Add MT8195 ccusys clock provider
>
> Signed-off-by: Chun-Jie Chen <[e-mail]>

Reviewed-by: Chen-Yu Tsai <[e-mail]>

Also, I noticed that Mediatek drivers don't support the reset controls found
in these clock controllers. Are there plans to add support for them?

Chun-Jie Chen Aug. 17, 2021, 12:56 a.m. UTC | #2

On Tue, 2021-07-06 at 17:00 +0800, Chen-Yu Tsai wrote:
> On Thu, Jun 17, 2021 at 6:59 AM Chun-Jie Chen
> <[e-mail]> wrote:
> > 
> > Add MT8195 ccusys clock provider
> > 
> > Signed-off-by: Chun-Jie Chen <[e-mail]>
> 
> Reviewed-by: Chen-Yu Tsai <[e-mail]>
> 
> Also, I noticed that Mediatek drivers don't support the reset
> controls found
> in these clock controllers. Are there plans to add support for them?

At present, we have no plan to support reset control in clock
controllers because no request from sub system, but we have reset
controller in MT8195 from TOPRGU [1].

[1] 
https://patchwork.kernel.org/project/linux-mediatek/list/?series=521219

Best Regards,
Chun-Jie

Patch

diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig
index 515155f3d185..6a6e496d08a4 100644
--- a/drivers/clk/mediatek/Kconfig
+++ b/drivers/clk/mediatek/Kconfig
@@ -606,6 +606,12 @@  config COMMON_CLK_MT8195_CAMSYS
 	help
 	  This driver supports MediaTek MT8195 camsys clocks.
 
+config COMMON_CLK_MT8195_CCUSYS
+	bool "Clock driver for MediaTek MT8195 ccusys"
+	depends on COMMON_CLK_MT8195
+	help
+	  This driver supports MediaTek MT8195 ccusys clocks.
+
 config COMMON_CLK_MT8516
 	bool "Clock driver for MediaTek MT8516"
 	depends on ARCH_MEDIATEK || COMPILE_TEST
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index 421064e7418c..bb8aac6f9185 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -84,5 +84,6 @@  obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195.o
 obj-$(CONFIG_COMMON_CLK_MT8195_AUDSYS) += clk-mt8195-aud.o
 obj-$(CONFIG_COMMON_CLK_MT8195_AUDSYS_SRC) += clk-mt8195-aud_src.o
 obj-$(CONFIG_COMMON_CLK_MT8195_CAMSYS) += clk-mt8195-cam.o
+obj-$(CONFIG_COMMON_CLK_MT8195_CCUSYS) += clk-mt8195-ccu.o
 obj-$(CONFIG_COMMON_CLK_MT8516) += clk-mt8516.o
 obj-$(CONFIG_COMMON_CLK_MT8516_AUDSYS) += clk-mt8516-aud.o
diff --git a/drivers/clk/mediatek/clk-mt8195-ccu.c b/drivers/clk/mediatek/clk-mt8195-ccu.c
new file mode 100644
index 000000000000..6d8c657bedb3
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt8195-ccu.c
@@ -0,0 +1,52 @@ 
+// SPDX-License-Identifier: GPL-2.0-only
+//
+// Copyright (c) 2021 MediaTek Inc.
+// Author: Chun-Jie Chen <[e-mail]>
+
+#include <linux/clk-provider.h>
+#include <linux/platform_device.h>
+
+#include "clk-mtk.h"
+#include "clk-gate.h"
+
+#include <dt-bindings/clock/mt8195-clk.h>
+
+static const struct mtk_gate_regs ccu_cg_regs = {
+	.set_ofs = 0x4,
+	.clr_ofs = 0x8,
+	.sta_ofs = 0x0,
+};
+
+#define GATE_CCU(_id, _name, _parent, _shift)			\
+	GATE_MTK(_id, _name, _parent, &ccu_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
+
+static const struct mtk_gate ccu_clks[] = {
+	GATE_CCU(CLK_CCU_LARB18, "ccu_larb18", "ccu_sel", 0),
+	GATE_CCU(CLK_CCU_AHB, "ccu_ahb", "ccu_sel", 1),
+	GATE_CCU(CLK_CCU_CCU0, "ccu_ccu0", "ccu_sel", 2),
+	GATE_CCU(CLK_CCU_CCU1, "ccu_ccu1", "ccu_sel", 3),
+};
+
+static const struct mtk_clk_desc ccu_desc = {
+	.clks = ccu_clks,
+	.num_clks = ARRAY_SIZE(ccu_clks),
+};
+
+static const struct of_device_id of_match_clk_mt8195_ccu[] = {
+	{
+		.compatible = "mediatek,mt8195-ccusys",
+		.data = &ccu_desc,
+	}, {
+		/* sentinel */
+	}
+};
+
+static struct platform_driver clk_mt8195_ccu_drv = {
+	.probe = mtk_clk_simple_probe,
+	.driver = {
+		.name = "clk-mt8195-ccu",
+		.of_match_table = of_match_clk_mt8195_ccu,
+	},
+};
+
+builtin_platform_driver(clk_mt8195_ccu_drv);