From patchwork Tue Aug 24 10:00:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 12454463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69E3EC4338F for ; Tue, 24 Aug 2021 10:01:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 27168610D1 for ; Tue, 24 Aug 2021 10:01:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 27168610D1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jIvZI8ccAxFT+ddgnMWk8sUAtA+nUJnQM6TSjpkLsmw=; b=GKrEtmgBUDTE1u gxH6eTlJvZeop/t4bzLfbzOtJYGTO5CNdxppcl1/Rs+ZTLJxYfRaKI0VqWadpcjBnpU/Cc1iNfRlq WnBoYvSSJzGmWGyGF8C3PoYcGVxF6fUOxkhmCBgy1Mz+phSIc8yKQYKIEg5qxpNbYgE96PY+TqzkD Ws4cgWa7wi+IJ12Goo1JOT4+9C40f1FH5CoC9RP1lzPTTK3Av/pfTVbE6DUbqCrp/+seMk1RtMiLB DC3Pkb9/6rcA0N6dNHQIP9vZ5sMo9MPG0XXUpY9DoaiLRFU9Rr0/KRVf5payak7VZZf5F2OuQZ6lr XFCxs0rmKUAM7QDP5k1g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mITEz-002P2b-Js; Tue, 24 Aug 2021 10:01:09 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mITEf-002Ool-5R; Tue, 24 Aug 2021 10:00:56 +0000 X-UUID: c1edea0c3f9f49689af1f91d00c7f7fd-20210824 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ePR290IGrQIxmoRJ8Q5eAnLip9u/6OhmvoBmw06DzE0=; b=K8suhY6MmGFCoFxW3jERkzCy2/n/68XlXi3ID22CXvvLoR91RhQXvt4u7f7szrmrUfeLQUga3UQxLBJZSg3vE6/6gTGwurUjo7V7jEJfOi559pcaoxshYpOzGC9JNx9kaNzuskPLlknW0xovaP2osUkz9LYjdFZNH3t94TyvJUo=; X-UUID: c1edea0c3f9f49689af1f91d00c7f7fd-20210824 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 771698229; Tue, 24 Aug 2021 03:00:32 -0700 Received: from mtkmbs05n2.mediatek.inc (172.21.101.140) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 24 Aug 2021 03:00:31 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 24 Aug 2021 18:00:29 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 24 Aug 2021 18:00:29 +0800 From: Moudy Ho To: , Mauro Carvalho Chehab , "Rob Herring" , Matthias Brugger , "Hans Verkuil" , Jernej Skrabec CC: Maoguang Meng , daoyuan huang , Ping-Hsun Wu , "Geert Uytterhoeven" , Rob Landley , Laurent Pinchart , , , , , , , , , , , , , , , Subject: [PATCH v7 1/5] soc: mediatek: mutex: add support for MDP Date: Tue, 24 Aug 2021 18:00:23 +0800 Message-ID: <20210824100027.25989-2-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210824100027.25989-1-moudy.ho@mediatek.com> References: <20210824100027.25989-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210824_030049_307521_255C6A27 X-CRM114-Status: GOOD ( 19.72 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add functions to support MDP: 1. Get mutex function 2. Enable/disable mutex 3. Enable MDP's modules 4. Write register via CMDQ Add MDP related settings for 8183 SoC 1. Register settings Signed-off-by: Moudy Ho --- drivers/soc/mediatek/mtk-mutex.c | 106 +++++++++++++++++++++++-- include/linux/soc/mediatek/mtk-mutex.h | 8 ++ 2 files changed, 108 insertions(+), 6 deletions(-) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index 2e4bcc300576..935f2849a094 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -7,9 +7,11 @@ #include #include #include +#include #include #include #include +#include #include #define MT2701_MUTEX0_MOD0 0x2c @@ -107,6 +109,10 @@ #define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_SOF_DSI0 << 6) #define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6) +#define MT8183_MUTEX_MDP_START 5 +#define MT8183_MUTEX_MDP_MOD_MASK 0x07FFFFFF +#define MT8183_MUTEX_MDP_SOF_MASK 0x00000007 + struct mtk_mutex { int id; bool claimed; @@ -123,11 +129,14 @@ enum mtk_mutex_sof_id { }; struct mtk_mutex_data { - const unsigned int *mutex_mod; - const unsigned int *mutex_sof; - const unsigned int mutex_mod_reg; - const unsigned int mutex_sof_reg; - const bool no_clk; + const unsigned int *mutex_mod; + const unsigned int *mutex_sof; + const unsigned int mutex_mod_reg; + const unsigned int mutex_sof_reg; + const unsigned int *mutex_mdp_offset; + const unsigned int mutex_mdp_mod_mask; + const unsigned int mutex_mdp_sof_mask; + const bool no_clk; }; struct mtk_mutex_ctx { @@ -136,6 +145,8 @@ struct mtk_mutex_ctx { void __iomem *regs; struct mtk_mutex mutex[10]; const struct mtk_mutex_data *data; + phys_addr_t addr; + u8 subsys_id; }; static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = { @@ -238,6 +249,14 @@ static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = { [MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0, }; +/* indicate which mutex is used by each pipepline */ +static const unsigned int mt8183_mutex_mdp_offset[MDP_PIPE_MAX] = { + [MDP_PIPE_IMGI] = MT8183_MUTEX_MDP_START, + [MDP_PIPE_RDMA0] = MT8183_MUTEX_MDP_START + 1, + [MDP_PIPE_WPEI] = MT8183_MUTEX_MDP_START + 2, + [MDP_PIPE_WPEI2] = MT8183_MUTEX_MDP_START + 3 +}; + static const struct mtk_mutex_data mt2701_mutex_driver_data = { .mutex_mod = mt2701_mutex_mod, .mutex_sof = mt2712_mutex_sof, @@ -272,6 +291,9 @@ static const struct mtk_mutex_data mt8183_mutex_driver_data = { .mutex_sof = mt8183_mutex_sof, .mutex_mod_reg = MT8183_MUTEX0_MOD0, .mutex_sof_reg = MT8183_MUTEX0_SOF0, + .mutex_mdp_offset = mt8183_mutex_mdp_offset, + .mutex_mdp_mod_mask = MT8183_MUTEX_MDP_MOD_MASK, + .mutex_mdp_sof_mask = MT8183_MUTEX_MDP_SOF_MASK, .no_clk = true, }; @@ -290,6 +312,21 @@ struct mtk_mutex *mtk_mutex_get(struct device *dev) } EXPORT_SYMBOL_GPL(mtk_mutex_get); +struct mtk_mutex *mtk_mutex_mdp_get(struct device *dev, + enum mtk_mdp_pipe_id id) +{ + struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev); + int i = mtx->data->mutex_mdp_offset[id]; + + if (!mtx->mutex[i].claimed) { + mtx->mutex[i].claimed = true; + return &mtx->mutex[i]; + } + + return ERR_PTR(-EBUSY); +} +EXPORT_SYMBOL_GPL(mtk_mutex_mdp_get); + void mtk_mutex_put(struct mtk_mutex *mutex) { struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, @@ -369,6 +406,25 @@ void mtk_mutex_add_comp(struct mtk_mutex *mutex, } EXPORT_SYMBOL_GPL(mtk_mutex_add_comp); +void mtk_mutex_add_mdp_mod(struct mtk_mutex *mutex, u32 mod, + struct mmsys_cmdq_cmd *cmd) +{ + struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + unsigned int offset; + + WARN_ON(&mtx->mutex[mutex->id] != mutex); + + offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, mutex->id); + cmdq_pkt_write_mask(cmd->pkt, mtx->subsys_id, mtx->addr + offset, + mod, mtx->data->mutex_mdp_mod_mask); + + offset = DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id); + cmdq_pkt_write_mask(cmd->pkt, mtx->subsys_id, mtx->addr + offset, + 0, mtx->data->mutex_mdp_sof_mask); +} +EXPORT_SYMBOL_GPL(mtk_mutex_add_mdp_mod); + void mtk_mutex_remove_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id) { @@ -420,6 +476,20 @@ void mtk_mutex_enable(struct mtk_mutex *mutex) } EXPORT_SYMBOL_GPL(mtk_mutex_enable); +void mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, + struct mmsys_cmdq_cmd *cmd) +{ + struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + + WARN_ON(&mtx->mutex[mutex->id] != mutex); + + cmdq_pkt_write_mask(cmd->pkt, mtx->subsys_id, + mtx->addr + DISP_REG_MUTEX_EN(mutex->id), + 0x1, 0x00000001); +} +EXPORT_SYMBOL_GPL(mtk_mutex_enable_by_cmdq); + void mtk_mutex_disable(struct mtk_mutex *mutex) { struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, @@ -431,6 +501,20 @@ void mtk_mutex_disable(struct mtk_mutex *mutex) } EXPORT_SYMBOL_GPL(mtk_mutex_disable); +void mtk_mutex_disable_by_cmdq(struct mtk_mutex *mutex, + struct mmsys_cmdq_cmd *cmd) +{ + struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + + WARN_ON(&mtx->mutex[mutex->id] != mutex); + + cmdq_pkt_write_mask(cmd->pkt, mtx->subsys_id, + mtx->addr + DISP_REG_MUTEX_EN(mutex->id), + 0x0, 0x00000001); +} +EXPORT_SYMBOL_GPL(mtk_mutex_disable_by_cmdq); + void mtk_mutex_acquire(struct mtk_mutex *mutex) { struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, @@ -458,7 +542,8 @@ static int mtk_mutex_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct mtk_mutex_ctx *mtx; - struct resource *regs; + struct cmdq_client_reg cmdq_reg; + struct resource *regs, addr; int i; mtx = devm_kzalloc(dev, sizeof(*mtx), GFP_KERNEL); @@ -479,6 +564,15 @@ static int mtk_mutex_probe(struct platform_device *pdev) } } + if (of_address_to_resource(dev->of_node, 0, &addr) < 0) + mtx->addr = 0L; + else + mtx->addr = addr.start; + + if (cmdq_dev_get_client_reg(dev, &cmdq_reg, 0) != 0) + dev_info(dev, "cmdq subsys id has not been set\n"); + mtx->subsys_id = cmdq_reg.subsys; + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); mtx->regs = devm_ioremap_resource(dev, regs); if (IS_ERR(mtx->regs)) { diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/mediatek/mtk-mutex.h index 6fe4ffbde290..d08b98419dd9 100644 --- a/include/linux/soc/mediatek/mtk-mutex.h +++ b/include/linux/soc/mediatek/mtk-mutex.h @@ -11,11 +11,19 @@ struct device; struct mtk_mutex; struct mtk_mutex *mtk_mutex_get(struct device *dev); +struct mtk_mutex *mtk_mutex_mdp_get(struct device *dev, + enum mtk_mdp_pipe_id id); int mtk_mutex_prepare(struct mtk_mutex *mutex); void mtk_mutex_add_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id); +void mtk_mutex_add_mdp_mod(struct mtk_mutex *mutex, u32 mod, + struct mmsys_cmdq_cmd *cmd); void mtk_mutex_enable(struct mtk_mutex *mutex); +void mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, + struct mmsys_cmdq_cmd *cmd); void mtk_mutex_disable(struct mtk_mutex *mutex); +void mtk_mutex_disable_by_cmdq(struct mtk_mutex *mutex, + struct mmsys_cmdq_cmd *cmd); void mtk_mutex_remove_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id); void mtk_mutex_unprepare(struct mtk_mutex *mutex);